/*
 * at91sam9260-smartweb.dts
 * (C) Copyright 2016
 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
 *
 * Based on:
 * at91sam9g20ek.dts - Device Tree file for Atmel at91sam9g20ek board
 *
 * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
 *
 * Licensed under GPLv2.
 */
/dts-v1/;
#include "at91sam9260.dtsi"

/ {
	model = "Siemens smartweb";
	compatible = "atmel,at91sam9260", "atmel,at91sam9";

	chosen {
		stdout-path = &dbgu;
	};

	memory {
		reg = <0x20000000 0x4000000>;
	};

	clocks {
		slow_xtal {
			clock-frequency = <32768>;
		};

		main_xtal {
			clock-frequency = <18432000>;
		};
	};

	ahb {
		apb {
			pinctrl@fffff400 {
				board {
					pinctrl_pck0_as_mck: pck0_as_mck {
						atmel,pins =
							<AT91_PIOC 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PC1 periph B */
					};

				};
			};

			dbgu: serial@fffff200 {
				status = "okay";
			};

			usart0: serial@fffb0000 {
				pinctrl-0 =
					<&pinctrl_usart0
					 &pinctrl_usart0_rts
					 &pinctrl_usart0_cts
					 &pinctrl_usart0_dtr_dsr
					 &pinctrl_usart0_dcd
					 &pinctrl_usart0_ri>;
				status = "okay";
			};

			usart1: serial@fffb4000 {
				status = "okay";
			};

			macb0: ethernet@fffc4000 {
				phy-mode = "rmii";
				status = "okay";
			};

			usb1: gadget@fffa4000 {
				atmel,vbus-gpio = <&pioC 5 GPIO_ACTIVE_HIGH>;
				status = "okay";
			};

			ssc0: ssc@fffbc000 {
				status = "okay";
				pinctrl-0 = <&pinctrl_ssc0_tx>;
			};

			rtc@fffffd20 {
				atmel,rtt-rtc-time-reg = <&gpbr 0x0>;
				status = "okay";
			};

			watchdog@fffffd40 {
				status = "okay";
			};

			gpbr: syscon@fffffd50 {
				status = "okay";
			};
		};

		nand0: nand@40000000 {
			nand-bus-width = <8>;
			nand-ecc-mode = "soft";
			nand-on-flash-bbt;
			status = "okay";
		};

		usb0: ohci@00500000 {
			num-ports = <2>;
			status = "okay";
		};
	};
};