Add new timings for 2GB Kingston
- New timings for MP of 2GB SOM
- Includes increase of MR4 poll interval (3e86d8971cfb)
Change-Id: I633bd997ca8aa124f7ced6ba8ac8b6fb0554a1b0
diff --git a/board/freescale/imx8mq_phanbell/ddr/lpddr4_timing_kingston_2gb.c b/board/freescale/imx8mq_phanbell/ddr/lpddr4_timing_kingston_2gb.c
index 09163cd..b6764df 100644
--- a/board/freescale/imx8mq_phanbell/ddr/lpddr4_timing_kingston_2gb.c
+++ b/board/freescale/imx8mq_phanbell/ddr/lpddr4_timing_kingston_2gb.c
@@ -1,12 +1,12 @@
/*
* Copyright 2019 NXP
- * Copyright 2019 Google LLC
+ * Copyright 2021 Google LLC
*
* SPDX-License-Identifier: GPL-2.0+
*
* Generated code from MX8M_DDR_tool
* Align with uboot version:
- * imx_v2018.03_4.14.78_1.0.0_ga ~ imx_v2018.04_4.19.35_1.0.0_ga
+ * imx_v2018.03_4.14.78_1.0.0_ga ~ imx_v2018.04_4.19.35_1.1.0_ga
*/
#include <linux/kernel.h>
@@ -16,14 +16,14 @@
/** Initialize DDRC registers **/
{ 0x3d400304, 0x1 },
{ 0x3d400030, 0x1 },
- { 0x3d400000, 0xa3080020 },
+ { 0x3d400000, 0xa1080020 },
{ 0x3d400028, 0x0 },
{ 0x3d400020, 0x203 },
{ 0x3d400024, 0x186a000 },
{ 0x3d400064, 0x6100e0 },
{ 0x3d4000d0, 0xc003061c },
{ 0x3d4000d4, 0x9e0000 },
- { 0x3d4000dc, 0xdc002d },
+ { 0x3d4000dc, 0xd4002d },
{ 0x3d4000e0, 0x310008 },
{ 0x3d4000e8, 0x66004a },
{ 0x3d4000ec, 0x16004a },
@@ -52,36 +52,60 @@
{ 0x3d4001c4, 0x1 },
{ 0x3d4000f4, 0x639 },
{ 0x3d400108, 0x70e1617 },
- { 0x3d400200, 0x16 },
+ { 0x3d400200, 0x1f },
{ 0x3d40020c, 0x0 },
{ 0x3d400210, 0x1f1f },
{ 0x3d400204, 0x80808 },
{ 0x3d400214, 0x7070707 },
- { 0x3d400218, 0xf070707 },
+ { 0x3d400218, 0x7070707 },
{ 0x3d402020, 0x1 },
{ 0x3d402024, 0x518b00 },
{ 0x3d402050, 0x20d040 },
- { 0x3d402064, 0x14002f },
- { 0x3d4020dc, 0x940009 },
+ { 0x3d402064, 0xc001c },
+ { 0x3d4020dc, 0x840000 },
{ 0x3d4020e0, 0x310000 },
{ 0x3d4020e8, 0x66004a },
{ 0x3d4020ec, 0x16004a },
- { 0x3d402100, 0xb070508 },
- { 0x3d402104, 0x3040b },
- { 0x3d402108, 0x305090c },
+ { 0x3d402100, 0xa040305 },
+ { 0x3d402104, 0x30407 },
+ { 0x3d402108, 0x203060b },
{ 0x3d40210c, 0x505000 },
- { 0x3d402110, 0x4040204 },
- { 0x3d402114, 0x2030303 },
+ { 0x3d402110, 0x2040202 },
+ { 0x3d402114, 0x2030202 },
{ 0x3d402118, 0x1010004 },
{ 0x3d40211c, 0x301 },
{ 0x3d402130, 0x20300 },
{ 0x3d402134, 0xa100002 },
- { 0x3d402138, 0x31 },
- { 0x3d402144, 0x220011 },
- { 0x3d402180, 0xc0a70006 },
- { 0x3d402190, 0x3858202 },
+ { 0x3d402138, 0x1d },
+ { 0x3d402144, 0x14000a },
+ { 0x3d402180, 0xc0640004 },
+ { 0x3d402190, 0x3818200 },
{ 0x3d402194, 0x80303 },
- { 0x3d4021b4, 0x502 },
+ { 0x3d4021b4, 0x100 },
+ { 0x3d403020, 0x1 },
+ { 0x3d403024, 0x1f40 },
+ { 0x3d403050, 0x20d040 },
+ { 0x3d403064, 0x30007 },
+ { 0x3d4030dc, 0x840000 },
+ { 0x3d4030e0, 0x310000 },
+ { 0x3d4030e8, 0x66004a },
+ { 0x3d4030ec, 0x16004a },
+ { 0x3d403100, 0xa010102 },
+ { 0x3d403104, 0x30404 },
+ { 0x3d403108, 0x203060b },
+ { 0x3d40310c, 0x505000 },
+ { 0x3d403110, 0x2040202 },
+ { 0x3d403114, 0x2030202 },
+ { 0x3d403118, 0x1010004 },
+ { 0x3d40311c, 0x301 },
+ { 0x3d403130, 0x20300 },
+ { 0x3d403134, 0xa100002 },
+ { 0x3d403138, 0x8 },
+ { 0x3d403144, 0x50003 },
+ { 0x3d403180, 0xc0190004 },
+ { 0x3d403190, 0x3818200 },
+ { 0x3d403194, 0x80303 },
+ { 0x3d4031b4, 0x100 },
{ 0x3d400244, 0x0 },
{ 0x3d400250, 0x29001505 },
{ 0x3d400254, 0x2c },
@@ -153,6 +177,14 @@
{ 0x11215f, 0x1ff },
{ 0x11305f, 0x1ff },
{ 0x11315f, 0x1ff },
+ { 0x21005f, 0x1ff },
+ { 0x21015f, 0x1ff },
+ { 0x21105f, 0x1ff },
+ { 0x21115f, 0x1ff },
+ { 0x21205f, 0x1ff },
+ { 0x21215f, 0x1ff },
+ { 0x21305f, 0x1ff },
+ { 0x21315f, 0x1ff },
{ 0x55, 0x1ff },
{ 0x1055, 0x1ff },
{ 0x2055, 0x1ff },
@@ -165,16 +197,22 @@
{ 0x9055, 0x1ff },
{ 0x200c5, 0x19 },
{ 0x1200c5, 0x7 },
+ { 0x2200c5, 0x7 },
{ 0x2002e, 0x2 },
- { 0x12002e, 0x1 },
+ { 0x12002e, 0x2 },
+ { 0x22002e, 0x2 },
{ 0x90204, 0x0 },
{ 0x190204, 0x0 },
- { 0x20024, 0x12a },
- { 0x2003a, 0x2 },
- { 0x120024, 0x12a },
+ { 0x290204, 0x0 },
+ { 0x20024, 0x1ab },
+ { 0x2003a, 0x0 },
+ { 0x120024, 0x1ab },
+ { 0x2003a, 0x0 },
+ { 0x220024, 0x1ab },
{ 0x2003a, 0x0 },
{ 0x20056, 0x3 },
{ 0x120056, 0x3 },
+ { 0x220056, 0x3 },
{ 0x1004d, 0xe00 },
{ 0x1014d, 0xe00 },
{ 0x1104d, 0xe00 },
@@ -191,6 +229,14 @@
{ 0x11214d, 0xe00 },
{ 0x11304d, 0xe00 },
{ 0x11314d, 0xe00 },
+ { 0x21004d, 0xe00 },
+ { 0x21014d, 0xe00 },
+ { 0x21104d, 0xe00 },
+ { 0x21114d, 0xe00 },
+ { 0x21204d, 0xe00 },
+ { 0x21214d, 0xe00 },
+ { 0x21304d, 0xe00 },
+ { 0x21314d, 0xe00 },
{ 0x10049, 0xeba },
{ 0x10149, 0xeba },
{ 0x11049, 0xeba },
@@ -207,6 +253,14 @@
{ 0x112149, 0xeba },
{ 0x113049, 0xeba },
{ 0x113149, 0xeba },
+ { 0x210049, 0xeba },
+ { 0x210149, 0xeba },
+ { 0x211049, 0xeba },
+ { 0x211149, 0xeba },
+ { 0x212049, 0xeba },
+ { 0x212149, 0xeba },
+ { 0x213049, 0xeba },
+ { 0x213149, 0xeba },
{ 0x43, 0x63 },
{ 0x1043, 0x63 },
{ 0x2043, 0x63 },
@@ -221,7 +275,8 @@
{ 0x20075, 0x4 },
{ 0x20050, 0x0 },
{ 0x20008, 0x320 },
- { 0x120008, 0xa7 },
+ { 0x120008, 0x64 },
+ { 0x220008, 0x19 },
{ 0x20088, 0x9 },
{ 0x200b2, 0xdc },
{ 0x10043, 0x5a1 },
@@ -241,25 +296,39 @@
{ 0x112143, 0x5a1 },
{ 0x113043, 0x5a1 },
{ 0x113143, 0x5a1 },
+ { 0x2200b2, 0xdc },
+ { 0x210043, 0x5a1 },
+ { 0x210143, 0x5a1 },
+ { 0x211043, 0x5a1 },
+ { 0x211143, 0x5a1 },
+ { 0x212043, 0x5a1 },
+ { 0x212143, 0x5a1 },
+ { 0x213043, 0x5a1 },
+ { 0x213143, 0x5a1 },
{ 0x200fa, 0x1 },
{ 0x1200fa, 0x1 },
+ { 0x2200fa, 0x1 },
{ 0x20019, 0x1 },
{ 0x120019, 0x1 },
- { 0x200f0, 0x0 },
+ { 0x220019, 0x1 },
+ { 0x200f0, 0x660 },
{ 0x200f1, 0x0 },
{ 0x200f2, 0x4444 },
{ 0x200f3, 0x8888 },
- { 0x200f4, 0x5555 },
+ { 0x200f4, 0x5665 },
{ 0x200f5, 0x0 },
{ 0x200f6, 0x0 },
{ 0x200f7, 0xf000 },
{ 0x20025, 0x0 },
{ 0x2002d, 0x0 },
{ 0x12002d, 0x0 },
+ { 0x22002d, 0x0 },
{ 0x200c7, 0x80 },
{ 0x1200c7, 0x80 },
+ { 0x2200c7, 0x80 },
{ 0x200ca, 0x106 },
{ 0x1200ca, 0x106 },
+ { 0x2200ca, 0x106 },
{ 0x20110, 0x2 },
{ 0x20111, 0x3 },
{ 0x20112, 0x4 },
@@ -1000,26 +1069,26 @@
{ 0x54008, 0x131f },
{ 0x54009, 0xc8 },
{ 0x5400b, 0x2 },
- { 0x54012, 0x310 },
- { 0x54019, 0x2ddc },
+ { 0x54012, 0x110 },
+ { 0x54019, 0x2dd4 },
{ 0x5401a, 0x31 },
{ 0x5401b, 0x4a66 },
{ 0x5401c, 0x4a08 },
{ 0x5401e, 0x16 },
- { 0x5401f, 0x2ddc },
+ { 0x5401f, 0x2dd4 },
{ 0x54020, 0x31 },
{ 0x54021, 0x4a66 },
{ 0x54022, 0x4a08 },
{ 0x54024, 0x16 },
{ 0x5402b, 0x1000 },
- { 0x5402c, 0x3 },
- { 0x54032, 0xdc00 },
+ { 0x5402c, 0x1 },
+ { 0x54032, 0xd400 },
{ 0x54033, 0x312d },
{ 0x54034, 0x6600 },
{ 0x54035, 0x84a },
{ 0x54036, 0x4a },
{ 0x54037, 0x1600 },
- { 0x54038, 0xdc00 },
+ { 0x54038, 0xd400 },
{ 0x54039, 0x312d },
{ 0x5403a, 0x6600 },
{ 0x5403b, 0x84a },
@@ -1032,35 +1101,75 @@
/* P1 message block paremeter for training firmware */
static struct dram_cfg_param ddr_fsp1_cfg[] = {
{ 0xd0000, 0x0 },
- { 0x54002, 0x1 },
- { 0x54003, 0x29c },
+ { 0x54002, 0x101 },
+ { 0x54003, 0x190 },
{ 0x54004, 0x2 },
{ 0x54005, 0x2228 },
{ 0x54006, 0x11 },
{ 0x54008, 0x121f },
{ 0x54009, 0xc8 },
{ 0x5400b, 0x2 },
- { 0x54012, 0x310 },
- { 0x54019, 0x994 },
+ { 0x54012, 0x110 },
+ { 0x54019, 0x84 },
{ 0x5401a, 0x31 },
{ 0x5401b, 0x4a66 },
{ 0x5401c, 0x4a08 },
{ 0x5401e, 0x16 },
- { 0x5401f, 0x994 },
+ { 0x5401f, 0x84 },
{ 0x54020, 0x31 },
{ 0x54021, 0x4a66 },
{ 0x54022, 0x4a08 },
{ 0x54024, 0x16 },
{ 0x5402b, 0x1000 },
- { 0x5402c, 0x3 },
- { 0x54032, 0x9400 },
- { 0x54033, 0x3109 },
+ { 0x5402c, 0x1 },
+ { 0x54032, 0x8400 },
+ { 0x54033, 0x3100 },
{ 0x54034, 0x6600 },
{ 0x54035, 0x84a },
{ 0x54036, 0x4a },
{ 0x54037, 0x1600 },
- { 0x54038, 0x9400 },
- { 0x54039, 0x3109 },
+ { 0x54038, 0x8400 },
+ { 0x54039, 0x3100 },
+ { 0x5403a, 0x6600 },
+ { 0x5403b, 0x84a },
+ { 0x5403c, 0x4a },
+ { 0x5403d, 0x1600 },
+ { 0xd0000, 0x1 },
+};
+
+
+/* P2 message block paremeter for training firmware */
+static struct dram_cfg_param ddr_fsp2_cfg[] = {
+ { 0xd0000, 0x0 },
+ { 0x54002, 0x102 },
+ { 0x54003, 0x64 },
+ { 0x54004, 0x2 },
+ { 0x54005, 0x2228 },
+ { 0x54006, 0x11 },
+ { 0x54008, 0x121f },
+ { 0x54009, 0xc8 },
+ { 0x5400b, 0x2 },
+ { 0x54012, 0x110 },
+ { 0x54019, 0x84 },
+ { 0x5401a, 0x31 },
+ { 0x5401b, 0x4a66 },
+ { 0x5401c, 0x4a08 },
+ { 0x5401e, 0x16 },
+ { 0x5401f, 0x84 },
+ { 0x54020, 0x31 },
+ { 0x54021, 0x4a66 },
+ { 0x54022, 0x4a08 },
+ { 0x54024, 0x16 },
+ { 0x5402b, 0x1000 },
+ { 0x5402c, 0x1 },
+ { 0x54032, 0x8400 },
+ { 0x54033, 0x3100 },
+ { 0x54034, 0x6600 },
+ { 0x54035, 0x84a },
+ { 0x54036, 0x4a },
+ { 0x54037, 0x1600 },
+ { 0x54038, 0x8400 },
+ { 0x54039, 0x3100 },
{ 0x5403a, 0x6600 },
{ 0x5403b, 0x84a },
{ 0x5403c, 0x4a },
@@ -1082,26 +1191,26 @@
{ 0x5400d, 0x100 },
{ 0x5400f, 0x100 },
{ 0x54010, 0x1f7f },
- { 0x54012, 0x310 },
- { 0x54019, 0x2ddc },
+ { 0x54012, 0x110 },
+ { 0x54019, 0x2dd4 },
{ 0x5401a, 0x31 },
{ 0x5401b, 0x4a66 },
{ 0x5401c, 0x4a08 },
{ 0x5401e, 0x16 },
- { 0x5401f, 0x2ddc },
+ { 0x5401f, 0x2dd4 },
{ 0x54020, 0x31 },
{ 0x54021, 0x4a66 },
{ 0x54022, 0x4a08 },
{ 0x54024, 0x16 },
{ 0x5402b, 0x1000 },
- { 0x5402c, 0x3 },
- { 0x54032, 0xdc00 },
+ { 0x5402c, 0x1 },
+ { 0x54032, 0xd400 },
{ 0x54033, 0x312d },
{ 0x54034, 0x6600 },
{ 0x54035, 0x84a },
{ 0x54036, 0x4a },
{ 0x54037, 0x1600 },
- { 0x54038, 0xdc00 },
+ { 0x54038, 0xd400 },
{ 0x54039, 0x312d },
{ 0x5403a, 0x6600 },
{ 0x5403b, 0x84a },
@@ -1604,10 +1713,14 @@
{ 0x2000c, 0xc8 },
{ 0x2000d, 0x7d0 },
{ 0x2000e, 0x2c },
- { 0x12000b, 0x14 },
- { 0x12000c, 0x29 },
- { 0x12000d, 0x1a1 },
+ { 0x12000b, 0xc },
+ { 0x12000c, 0x19 },
+ { 0x12000d, 0xfa },
{ 0x12000e, 0x10 },
+ { 0x22000b, 0x3 },
+ { 0x22000c, 0x6 },
+ { 0x22000d, 0x3e },
+ { 0x22000e, 0x10 },
{ 0x9000c, 0x0 },
{ 0x9000d, 0x173 },
{ 0x9000e, 0x60 },
@@ -1618,6 +1731,10 @@
{ 0x90013, 0x6152 },
{ 0x20010, 0x5a },
{ 0x20011, 0x3 },
+ { 0x120010, 0x5a },
+ { 0x120011, 0x3 },
+ { 0x220010, 0x5a },
+ { 0x220011, 0x3 },
{ 0x40080, 0xe0 },
{ 0x40081, 0x12 },
{ 0x40082, 0xe0 },
@@ -1630,6 +1747,12 @@
{ 0x140083, 0x12 },
{ 0x140084, 0xe0 },
{ 0x140085, 0x12 },
+ { 0x240080, 0xe0 },
+ { 0x240081, 0x12 },
+ { 0x240082, 0xe0 },
+ { 0x240083, 0x12 },
+ { 0x240084, 0xe0 },
+ { 0x240085, 0x12 },
{ 0x400fd, 0xf },
{ 0x10011, 0x1 },
{ 0x10012, 0x1 },
@@ -1701,13 +1824,20 @@
.fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_cfg),
},
{
- /* P1 667mts 1D */
- .drate = 667,
+ /* P1 400mts 1D */
+ .drate = 400,
.fw_type = FW_1D_IMAGE,
.fsp_cfg = ddr_fsp1_cfg,
.fsp_cfg_num = ARRAY_SIZE(ddr_fsp1_cfg),
},
{
+ /* P2 100mts 1D */
+ .drate = 100,
+ .fw_type = FW_1D_IMAGE,
+ .fsp_cfg = ddr_fsp2_cfg,
+ .fsp_cfg_num = ARRAY_SIZE(ddr_fsp2_cfg),
+ },
+ {
/* P0 3200mts 2D */
.drate = 3200,
.fw_type = FW_2D_IMAGE,
@@ -1728,6 +1858,6 @@
.ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr),
.ddrphy_pie = ddr_phy_pie,
.ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
- .fsp_table = { 3200, 667, },
+ .fsp_table = { 3200, 400, 100, },
};
