| /* |
| * Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved. |
| * |
| * SPDX-License-Identifier: BSD-3-Clause |
| */ |
| |
| #ifndef PLAT_MACROS_S |
| #define PLAT_MACROS_S |
| |
| #include <drivers/arm/gicv2.h> |
| #include <platform_def.h> |
| |
| .section .rodata.gic_reg_name, "aS" |
| |
| gicc_regs: |
| .asciz "gicc_hppir", "gicc_ahppir", "gicc_ctlr", "" |
| gicd_pend_reg: |
| .asciz "gicd_ispendr regs (Offsets 0x200 - 0x278)\n Offset:\t\t\tvalue\n" |
| newline: |
| .asciz "\n" |
| spacer: |
| .asciz ":\t\t0x" |
| |
| /* --------------------------------------------- |
| * The below required platform porting macro |
| * prints out relevant GIC and CCI registers |
| * whenever an unhandled exception is taken in |
| * BL31. |
| * Clobbers: x0 - x10, x16, x17, sp |
| * --------------------------------------------- |
| */ |
| .macro plat_crash_print_regs |
| |
| /* GICC registers */ |
| |
| mov_imm x17, AML_GICC_BASE |
| |
| adr x6, gicc_regs |
| ldr w8, [x17, #GICC_HPPIR] |
| ldr w9, [x17, #GICC_AHPPIR] |
| ldr w10, [x17, #GICC_CTLR] |
| bl str_in_crash_buf_print |
| |
| /* GICD registers */ |
| |
| mov_imm x16, AML_GICD_BASE |
| |
| add x7, x16, #GICD_ISPENDR |
| adr x4, gicd_pend_reg |
| bl asm_print_str |
| |
| gicd_ispendr_loop: |
| sub x4, x7, x16 |
| cmp x4, #0x280 |
| b.eq exit_print_gic_regs |
| bl asm_print_hex |
| |
| adr x4, spacer |
| bl asm_print_str |
| |
| ldr x4, [x7], #8 |
| bl asm_print_hex |
| |
| adr x4, newline |
| bl asm_print_str |
| b gicd_ispendr_loop |
| exit_print_gic_regs: |
| |
| .endm |
| |
| #endif /* PLAT_MACROS_S */ |
