| /* |
| * Copyright (c) 2015-2019, Renesas Electronics Corporation. |
| * All rights reserved. |
| * |
| * SPDX-License-Identifier: BSD-3-Clause |
| */ |
| |
| #define DDR_PHY_SLICE_REGSET_OFS_H3 0x0400 |
| #define DDR_PHY_ADR_V_REGSET_OFS_H3 0x0600 |
| #define DDR_PHY_ADR_I_REGSET_OFS_H3 0x0680 |
| #define DDR_PHY_ADR_G_REGSET_OFS_H3 0x0700 |
| #define DDR_PI_REGSET_OFS_H3 0x0200 |
| |
| #define DDR_PHY_SLICE_REGSET_SIZE_H3 0x80 |
| #define DDR_PHY_ADR_V_REGSET_SIZE_H3 0x80 |
| #define DDR_PHY_ADR_I_REGSET_SIZE_H3 0x80 |
| #define DDR_PHY_ADR_G_REGSET_SIZE_H3 0x80 |
| #define DDR_PI_REGSET_SIZE_H3 0x100 |
| |
| #define DDR_PHY_SLICE_REGSET_NUM_H3 88 |
| #define DDR_PHY_ADR_V_REGSET_NUM_H3 37 |
| #define DDR_PHY_ADR_I_REGSET_NUM_H3 37 |
| #define DDR_PHY_ADR_G_REGSET_NUM_H3 59 |
| #define DDR_PI_REGSET_NUM_H3 181 |
| |
| static const uint32_t DDR_PHY_SLICE_REGSET_H3[DDR_PHY_SLICE_REGSET_NUM_H3] = { |
| /*0400*/ 0x000004f0, |
| /*0401*/ 0x00000000, |
| /*0402*/ 0x00000000, |
| /*0403*/ 0x00000100, |
| /*0404*/ 0x01003c0c, |
| /*0405*/ 0x02003c0c, |
| /*0406*/ 0x00010300, |
| /*0407*/ 0x04000100, |
| /*0408*/ 0x00000300, |
| /*0409*/ 0x000700c0, |
| /*040a*/ 0x00b00201, |
| /*040b*/ 0x00000020, |
| /*040c*/ 0x00000000, |
| /*040d*/ 0x00000000, |
| /*040e*/ 0x00000000, |
| /*040f*/ 0x00000000, |
| /*0410*/ 0x00000000, |
| /*0411*/ 0x00000000, |
| /*0412*/ 0x00000000, |
| /*0413*/ 0x09000000, |
| /*0414*/ 0x04080000, |
| /*0415*/ 0x04080400, |
| /*0416*/ 0x00000000, |
| /*0417*/ 0x32103210, |
| /*0418*/ 0x00800708, |
| /*0419*/ 0x000f000c, |
| /*041a*/ 0x00000100, |
| /*041b*/ 0x55aa55aa, |
| /*041c*/ 0x33cc33cc, |
| /*041d*/ 0x0ff00ff0, |
| /*041e*/ 0x0f0ff0f0, |
| /*041f*/ 0x00008e38, |
| /*0420*/ 0x76543210, |
| /*0421*/ 0x00000001, |
| /*0422*/ 0x00000000, |
| /*0423*/ 0x00000000, |
| /*0424*/ 0x00000000, |
| /*0425*/ 0x00000000, |
| /*0426*/ 0x00000000, |
| /*0427*/ 0x00000000, |
| /*0428*/ 0x00000000, |
| /*0429*/ 0x00000000, |
| /*042a*/ 0x00000000, |
| /*042b*/ 0x00000000, |
| /*042c*/ 0x00000000, |
| /*042d*/ 0x00000000, |
| /*042e*/ 0x00000000, |
| /*042f*/ 0x00000000, |
| /*0430*/ 0x00000000, |
| /*0431*/ 0x00000000, |
| /*0432*/ 0x00000000, |
| /*0433*/ 0x00200000, |
| /*0434*/ 0x08200820, |
| /*0435*/ 0x08200820, |
| /*0436*/ 0x08200820, |
| /*0437*/ 0x08200820, |
| /*0438*/ 0x08200820, |
| /*0439*/ 0x00000820, |
| /*043a*/ 0x03000300, |
| /*043b*/ 0x03000300, |
| /*043c*/ 0x03000300, |
| /*043d*/ 0x03000300, |
| /*043e*/ 0x00000300, |
| /*043f*/ 0x00000000, |
| /*0440*/ 0x00000000, |
| /*0441*/ 0x00000000, |
| /*0442*/ 0x00000000, |
| /*0443*/ 0x00a000a0, |
| /*0444*/ 0x00a000a0, |
| /*0445*/ 0x00a000a0, |
| /*0446*/ 0x00a000a0, |
| /*0447*/ 0x00a000a0, |
| /*0448*/ 0x00a000a0, |
| /*0449*/ 0x00a000a0, |
| /*044a*/ 0x00a000a0, |
| /*044b*/ 0x00a000a0, |
| /*044c*/ 0x01040109, |
| /*044d*/ 0x00000200, |
| /*044e*/ 0x01000000, |
| /*044f*/ 0x00000200, |
| /*0450*/ 0x4041a151, |
| /*0451*/ 0xc00141a0, |
| /*0452*/ 0x0e0100c0, |
| /*0453*/ 0x0010000c, |
| /*0454*/ 0x0c064208, |
| /*0455*/ 0x000f0c18, |
| /*0456*/ 0x00e00140, |
| /*0457*/ 0x00000c20 |
| }; |
| |
| static const uint32_t DDR_PHY_ADR_V_REGSET_H3[DDR_PHY_ADR_V_REGSET_NUM_H3] = { |
| /*0600*/ 0x00000000, |
| /*0601*/ 0x00000000, |
| /*0602*/ 0x00000000, |
| /*0603*/ 0x00000000, |
| /*0604*/ 0x00000000, |
| /*0605*/ 0x00000000, |
| /*0606*/ 0x00000002, |
| /*0607*/ 0x00000000, |
| /*0608*/ 0x00000000, |
| /*0609*/ 0x00000000, |
| /*060a*/ 0x00400320, |
| /*060b*/ 0x00000040, |
| /*060c*/ 0x00dcba98, |
| /*060d*/ 0x00000000, |
| /*060e*/ 0x00dcba98, |
| /*060f*/ 0x01000000, |
| /*0610*/ 0x00020003, |
| /*0611*/ 0x00000000, |
| /*0612*/ 0x00000000, |
| /*0613*/ 0x00000000, |
| /*0614*/ 0x00002a01, |
| /*0615*/ 0x00000015, |
| /*0616*/ 0x00000015, |
| /*0617*/ 0x0000002a, |
| /*0618*/ 0x00000033, |
| /*0619*/ 0x0000000c, |
| /*061a*/ 0x0000000c, |
| /*061b*/ 0x00000033, |
| /*061c*/ 0x00418820, |
| /*061d*/ 0x003f0000, |
| /*061e*/ 0x0000003f, |
| /*061f*/ 0x0002006e, |
| /*0620*/ 0x02000200, |
| /*0621*/ 0x02000200, |
| /*0622*/ 0x00000200, |
| /*0623*/ 0x42080010, |
| /*0624*/ 0x00000003 |
| }; |
| |
| static const uint32_t DDR_PHY_ADR_I_REGSET_H3[DDR_PHY_ADR_I_REGSET_NUM_H3] = { |
| /*0680*/ 0x04040404, |
| /*0681*/ 0x00000404, |
| /*0682*/ 0x00000000, |
| /*0683*/ 0x00000000, |
| /*0684*/ 0x00000000, |
| /*0685*/ 0x00000000, |
| /*0686*/ 0x00000002, |
| /*0687*/ 0x00000000, |
| /*0688*/ 0x00000000, |
| /*0689*/ 0x00000000, |
| /*068a*/ 0x00400320, |
| /*068b*/ 0x00000040, |
| /*068c*/ 0x00000000, |
| /*068d*/ 0x00000000, |
| /*068e*/ 0x00000000, |
| /*068f*/ 0x01000000, |
| /*0690*/ 0x00020003, |
| /*0691*/ 0x00000000, |
| /*0692*/ 0x00000000, |
| /*0693*/ 0x00000000, |
| /*0694*/ 0x00002a01, |
| /*0695*/ 0x00000015, |
| /*0696*/ 0x00000015, |
| /*0697*/ 0x0000002a, |
| /*0698*/ 0x00000033, |
| /*0699*/ 0x0000000c, |
| /*069a*/ 0x0000000c, |
| /*069b*/ 0x00000033, |
| /*069c*/ 0x00000000, |
| /*069d*/ 0x00000000, |
| /*069e*/ 0x00000000, |
| /*069f*/ 0x0002006e, |
| /*06a0*/ 0x02000200, |
| /*06a1*/ 0x02000200, |
| /*06a2*/ 0x00000200, |
| /*06a3*/ 0x42080010, |
| /*06a4*/ 0x00000003 |
| }; |
| |
| static const uint32_t DDR_PHY_ADR_G_REGSET_H3[DDR_PHY_ADR_G_REGSET_NUM_H3] = { |
| /*0700*/ 0x00000001, |
| /*0701*/ 0x00000000, |
| /*0702*/ 0x00000005, |
| /*0703*/ 0x04000f00, |
| /*0704*/ 0x00020080, |
| /*0705*/ 0x00020055, |
| /*0706*/ 0x00000000, |
| /*0707*/ 0x00000000, |
| /*0708*/ 0x00000000, |
| /*0709*/ 0x00000050, |
| /*070a*/ 0x00000000, |
| /*070b*/ 0x01010100, |
| /*070c*/ 0x00000200, |
| /*070d*/ 0x00001102, |
| /*070e*/ 0x00000000, |
| /*070f*/ 0x000f1f00, |
| /*0710*/ 0x0f1f0f1f, |
| /*0711*/ 0x0f1f0f1f, |
| /*0712*/ 0x00020003, |
| /*0713*/ 0x02000200, |
| /*0714*/ 0x00000200, |
| /*0715*/ 0x00001102, |
| /*0716*/ 0x00000064, |
| /*0717*/ 0x00000000, |
| /*0718*/ 0x00000000, |
| /*0719*/ 0x00000502, |
| /*071a*/ 0x027f6e00, |
| /*071b*/ 0x007f007f, |
| /*071c*/ 0x00007f3c, |
| /*071d*/ 0x00047f6e, |
| /*071e*/ 0x0003154f, |
| /*071f*/ 0x0001154f, |
| /*0720*/ 0x0001154f, |
| /*0721*/ 0x0001154f, |
| /*0722*/ 0x0001154f, |
| /*0723*/ 0x00003fee, |
| /*0724*/ 0x0001154f, |
| /*0725*/ 0x00003fee, |
| /*0726*/ 0x0001154f, |
| /*0727*/ 0x00007f3c, |
| /*0728*/ 0x0001154f, |
| /*0729*/ 0x00000000, |
| /*072a*/ 0x00000000, |
| /*072b*/ 0x00000000, |
| /*072c*/ 0x65000000, |
| /*072d*/ 0x00000000, |
| /*072e*/ 0x00000000, |
| /*072f*/ 0x00000201, |
| /*0730*/ 0x00000000, |
| /*0731*/ 0x00000000, |
| /*0732*/ 0x00000000, |
| /*0733*/ 0x00000000, |
| /*0734*/ 0x00000000, |
| /*0735*/ 0x00000000, |
| /*0736*/ 0x00000000, |
| /*0737*/ 0x00000000, |
| /*0738*/ 0x00000000, |
| /*0739*/ 0x00000000, |
| /*073a*/ 0x00000000 |
| }; |
| |
| static const uint32_t DDR_PI_REGSET_H3[DDR_PI_REGSET_NUM_H3] = { |
| /*0200*/ 0x00000b00, |
| /*0201*/ 0x00000100, |
| /*0202*/ 0x00000000, |
| /*0203*/ 0x0000ffff, |
| /*0204*/ 0x00000000, |
| /*0205*/ 0x0000ffff, |
| /*0206*/ 0x00000000, |
| /*0207*/ 0x304cffff, |
| /*0208*/ 0x00000200, |
| /*0209*/ 0x00000200, |
| /*020a*/ 0x00000200, |
| /*020b*/ 0x00000200, |
| /*020c*/ 0x0000304c, |
| /*020d*/ 0x00000200, |
| /*020e*/ 0x00000200, |
| /*020f*/ 0x00000200, |
| /*0210*/ 0x00000200, |
| /*0211*/ 0x0000304c, |
| /*0212*/ 0x00000200, |
| /*0213*/ 0x00000200, |
| /*0214*/ 0x00000200, |
| /*0215*/ 0x00000200, |
| /*0216*/ 0x00010000, |
| /*0217*/ 0x00000003, |
| /*0218*/ 0x01000001, |
| /*0219*/ 0x00000000, |
| /*021a*/ 0x00000000, |
| /*021b*/ 0x00000000, |
| /*021c*/ 0x00000000, |
| /*021d*/ 0x00000000, |
| /*021e*/ 0x00000000, |
| /*021f*/ 0x00000000, |
| /*0220*/ 0x00000000, |
| /*0221*/ 0x00000000, |
| /*0222*/ 0x00000000, |
| /*0223*/ 0x00000000, |
| /*0224*/ 0x00000000, |
| /*0225*/ 0x00000000, |
| /*0226*/ 0x00000000, |
| /*0227*/ 0x00000000, |
| /*0228*/ 0x00000000, |
| /*0229*/ 0x0f000101, |
| /*022a*/ 0x08492d25, |
| /*022b*/ 0x500e0c04, |
| /*022c*/ 0x0002500e, |
| /*022d*/ 0x00460003, |
| /*022e*/ 0x182600cf, |
| /*022f*/ 0x182600cf, |
| /*0230*/ 0x00000005, |
| /*0231*/ 0x00000000, |
| /*0232*/ 0x00000000, |
| /*0233*/ 0x00000000, |
| /*0234*/ 0x00000000, |
| /*0235*/ 0x00000000, |
| /*0236*/ 0x00000000, |
| /*0237*/ 0x00000000, |
| /*0238*/ 0x01000000, |
| /*0239*/ 0x00040404, |
| /*023a*/ 0x01280a00, |
| /*023b*/ 0x00000000, |
| /*023c*/ 0x000f0000, |
| /*023d*/ 0x00001803, |
| /*023e*/ 0x00000000, |
| /*023f*/ 0x00000000, |
| /*0240*/ 0x00060002, |
| /*0241*/ 0x00010001, |
| /*0242*/ 0x01000101, |
| /*0243*/ 0x04020201, |
| /*0244*/ 0x00080804, |
| /*0245*/ 0x00000000, |
| /*0246*/ 0x08030000, |
| /*0247*/ 0x15150408, |
| /*0248*/ 0x00000000, |
| /*0249*/ 0x00000000, |
| /*024a*/ 0x00000000, |
| /*024b*/ 0x001e0f0f, |
| /*024c*/ 0x00000000, |
| /*024d*/ 0x01000300, |
| /*024e*/ 0x00000000, |
| /*024f*/ 0x00000000, |
| /*0250*/ 0x01000000, |
| /*0251*/ 0x00010101, |
| /*0252*/ 0x000e0e0e, |
| /*0253*/ 0x000c0c0c, |
| /*0254*/ 0x02060601, |
| /*0255*/ 0x00000000, |
| /*0256*/ 0x00000003, |
| /*0257*/ 0x00181703, |
| /*0258*/ 0x00280006, |
| /*0259*/ 0x00280016, |
| /*025a*/ 0x00000016, |
| /*025b*/ 0x00000000, |
| /*025c*/ 0x00000000, |
| /*025d*/ 0x00000000, |
| /*025e*/ 0x140a0000, |
| /*025f*/ 0x0005010a, |
| /*0260*/ 0x03018d03, |
| /*0261*/ 0x000a018d, |
| /*0262*/ 0x00060100, |
| /*0263*/ 0x01000006, |
| /*0264*/ 0x018e018e, |
| /*0265*/ 0x018e0100, |
| /*0266*/ 0x1111018e, |
| /*0267*/ 0x10010204, |
| /*0268*/ 0x09090650, |
| /*0269*/ 0x20110202, |
| /*026a*/ 0x00201000, |
| /*026b*/ 0x00201000, |
| /*026c*/ 0x04041000, |
| /*026d*/ 0x18020100, |
| /*026e*/ 0x00010118, |
| /*026f*/ 0x004b004a, |
| /*0270*/ 0x050f0000, |
| /*0271*/ 0x0c01021e, |
| /*0272*/ 0x34000000, |
| /*0273*/ 0x00000000, |
| /*0274*/ 0x00000000, |
| /*0275*/ 0x00000000, |
| /*0276*/ 0x312ed400, |
| /*0277*/ 0xd4111132, |
| /*0278*/ 0x1132312e, |
| /*0279*/ 0x312ed411, |
| /*027a*/ 0x00111132, |
| /*027b*/ 0x32312ed4, |
| /*027c*/ 0x2ed41111, |
| /*027d*/ 0x11113231, |
| /*027e*/ 0x32312ed4, |
| /*027f*/ 0xd4001111, |
| /*0280*/ 0x1132312e, |
| /*0281*/ 0x312ed411, |
| /*0282*/ 0xd4111132, |
| /*0283*/ 0x1132312e, |
| /*0284*/ 0x2ed40011, |
| /*0285*/ 0x11113231, |
| /*0286*/ 0x32312ed4, |
| /*0287*/ 0x2ed41111, |
| /*0288*/ 0x11113231, |
| /*0289*/ 0x00020000, |
| /*028a*/ 0x018d018d, |
| /*028b*/ 0x0c08018d, |
| /*028c*/ 0x1f121d22, |
| /*028d*/ 0x4301b344, |
| /*028e*/ 0x10172006, |
| /*028f*/ 0x121d220c, |
| /*0290*/ 0x01b3441f, |
| /*0291*/ 0x17200643, |
| /*0292*/ 0x1d220c10, |
| /*0293*/ 0x00001f12, |
| /*0294*/ 0x4301b344, |
| /*0295*/ 0x10172006, |
| /*0296*/ 0x00020002, |
| /*0297*/ 0x00020002, |
| /*0298*/ 0x00020002, |
| /*0299*/ 0x00020002, |
| /*029a*/ 0x00020002, |
| /*029b*/ 0x00000000, |
| /*029c*/ 0x00000000, |
| /*029d*/ 0x00000000, |
| /*029e*/ 0x00000000, |
| /*029f*/ 0x00000000, |
| /*02a0*/ 0x00000000, |
| /*02a1*/ 0x00000000, |
| /*02a2*/ 0x00000000, |
| /*02a3*/ 0x00000000, |
| /*02a4*/ 0x00000000, |
| /*02a5*/ 0x00000000, |
| /*02a6*/ 0x00000000, |
| /*02a7*/ 0x01000400, |
| /*02a8*/ 0x00304c00, |
| /*02a9*/ 0x0001e2f8, |
| /*02aa*/ 0x0000304c, |
| /*02ab*/ 0x0001e2f8, |
| /*02ac*/ 0x0000304c, |
| /*02ad*/ 0x0001e2f8, |
| /*02ae*/ 0x08000000, |
| /*02af*/ 0x00000100, |
| /*02b0*/ 0x00000000, |
| /*02b1*/ 0x00000000, |
| /*02b2*/ 0x00000000, |
| /*02b3*/ 0x00000000, |
| /*02b4*/ 0x00000002 |
| }; |