mt8173: Move SPM related PLL settings to ARM TF
Move SPM related PLL settings to spm_boot_init in ARM TF SPM driver
Change-Id: I414b896caae072570c8de33a25e06db4ae011f57
Signed-off-by: yt.lee <yt.lee@mediatek.com>
diff --git a/plat/mediatek/mt8173/drivers/spm/spm.c b/plat/mediatek/mt8173/drivers/spm/spm.c
index 2801925..45defd8 100644
--- a/plat/mediatek/mt8173/drivers/spm/spm.c
+++ b/plat/mediatek/mt8173/drivers/spm/spm.c
@@ -386,6 +386,8 @@
{
/* Only CPU0 is online during boot, initialize cpu online reserve bit */
mmio_write_32(SPM_PCM_RESERVE, 0xFE);
+ mmio_clrbits_32(AP_PLL_CON3, 0xFFFFF);
+ mmio_clrbits_32(AP_PLL_CON4, 0xF);
spm_lock_init();
spm_register_init();
}
diff --git a/plat/mediatek/mt8173/drivers/spm/spm.h b/plat/mediatek/mt8173/drivers/spm/spm.h
index f1e7674..4e78c72 100644
--- a/plat/mediatek/mt8173/drivers/spm/spm.h
+++ b/plat/mediatek/mt8173/drivers/spm/spm.h
@@ -129,6 +129,9 @@
#define SPM_SLEEP_CA15_WFI2_EN (SPM_BASE + 0xf18)
#define SPM_SLEEP_CA15_WFI3_EN (SPM_BASE + 0xf1c)
+#define AP_PLL_CON3 0x1020900c
+#define AP_PLL_CON4 0x10209010
+
#define SPM_PROJECT_CODE 0xb16
#define SPM_REGWR_EN (1U << 0)
