/*************************************************************************/ /*!
@Title          RGX Config BVNC 22.V.54.30
@Copyright      Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@License        Dual MIT/GPLv2

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*/ /**************************************************************************/

#ifndef _RGXCONFIG_KM_22_V_54_30_H_
#define _RGXCONFIG_KM_22_V_54_30_H_

/***** Automatically generated file (06/10/2017 07:00:42): Do not edit manually ********************/
/***** Timestamp:  (06/10/2017 07:00:42)************************************************************/

#define RGX_BNC_KM_B 22
#define RGX_BNC_KM_N 54
#define RGX_BNC_KM_C 30

/******************************************************************************
 * DDK Defines
 *****************************************************************************/
#define RGX_FEATURE_NUM_CLUSTERS (1)
#define RGX_FEATURE_VIRTUAL_ADDRESS_SPACE_BITS (40)
#define RGX_FEATURE_ROGUEXE 
#define RGX_FEATURE_NUM_RASTER_PIPES (1)
#define RGX_FEATURE_SIMPLE_INTERNAL_PARAMETER_FORMAT 
#define RGX_FEATURE_SIMPLE_PARAMETER_FORMAT_VERSION (1)
#define RGX_FEATURE_SIMPLE_INTERNAL_PARAMETER_FORMAT_V1 
#define RGX_FEATURE_PBE2_IN_XE 
#define RGX_FEATURE_COMPUTE 
#define RGX_FEATURE_GS_RTA_SUPPORT 
#define RGX_FEATURE_MIPS 
#define RGX_FEATURE_SINGLE_BIF 
#define RGX_FEATURE_GPU_VIRTUALISATION 
#define RGX_FEATURE_PBVNC_COREID_REG 
#define RGX_FEATURE_PERFBUS 
#define RGX_FEATURE_SYS_BUS_SECURE_RESET 
#define RGX_FEATURE_NUM_ISP_IPP_PIPES (4)
#define RGX_FEATURE_AXI_ACELITE 
#define RGX_FEATURE_PHYS_BUS_WIDTH (32)
#define RGX_FEATURE_SLC_SIZE_IN_BYTES (64*1024)
#define RGX_FEATURE_SLC_BANKS (1)
#define RGX_FEATURE_SLC_CACHE_LINE_SIZE_BITS (512)


#endif /* _RGXCONFIG_22_V_54_30_H_ */