blob: 008c3e3f0fba45fbd30f688045b2c90e56e67c4d [file] [log] [blame]
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (c) 2019 BayLibre, SAS.
* Author: Fabien Parent <fparent@baylibre.com>
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include "mt8167.dtsi"
#include "mt6392.dtsi"
/ {
model = "Google Coral MT8167";
aliases {
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:921600n8";
};
memory: memory@40000000 {
device_type = "memory";
reg = <0 0x40000000 0 0x80000000>;
};
firmware {
optee: optee@4fd00000 {
compatible = "linaro,optee-tz";
method = "smc";
};
};
usb0_vbus: regulator@0 {
compatible = "regulator-fixed";
regulator-name = "usb0_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&pio 17 GPIO_ACTIVE_LOW>;
};
ga1600_pmic: ga1600_pmic {
compatible = "regulator-fixed";
regulator-name = "ga1600_pmic";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
gpio = <&pio 56 GPIO_ACTIVE_HIGH>;
startup-delay-us = <0>;
enable-active-high;
};
ga1600_reset: ga1600_reset {
compatible = "regulator-fixed";
regulator-name = "ga1600_reset";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
gpio = <&pio 57 GPIO_ACTIVE_HIGH>;
startup-delay-us = <150>;
enable-active-high;
regulator-always-on;
};
mt8167_audio_codec: mt8167_audio_codec {
compatible = "mediatek,mt8167-codec";
status = "okay";
clocks = <&topckgen CLK_TOP_AUDIO>;
clock-names = "bus";
mediatek,afe-regmap = <&afe>;
mediatek,apmixedsys-regmap = <&apmixedsys>;
mediatek,pwrap-regmap = <&pwrap>;
mediatek,dmic-wire-mode = <1>; // TWO_WIRE
mediatek,headphone-cap-sel = <1>; // 22uF
mediatek,speaker-mode = <0>; // Class D
};
sound: sound {
compatible = "mediatek,snd-soc-mt8167-excelsior";
status = "okay";
mediatek,platform = <&afe>;
pinctrl-names = "default";
pinctrl-0 = <&aud_pins_default>;
mediatek,jack-detect-gpio = <&pio 40 0>;
};
auxadc: adc@11003000 {
compatible = "mediatek,mt2712-auxadc";
reg = <0 0x11003000 0 0x1000>;
clocks = <&topckgen CLK_TOP_AUX_ADC>;
clock-names = "main";
#io-channel-cells = <1>;
status = "okay";
};
thermal: thermal@1100d000 {
#thermal-sensor-cells = <0>;
compatible = "mediatek,mt8516-thermal";
reg = <0 0x1100d000 0 0x1000>;
interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_LOW>;
clocks = <&topckgen CLK_TOP_THEM>, <&topckgen CLK_TOP_AUX_ADC>;
clock-names = "therm", "auxadc";
mediatek,auxadc = <&auxadc>;
mediatek,apmixedsys = <&apmixedsys>;
nvmem-cells = <&thermal_calibration>;
nvmem-cell-names = "calibration-data";
};
efuse: efuse@10009000 {
compatible = "mediatek,mt8173-efuse";
reg = <0 0x10009000 0 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
thermal_calibration: calib@180 {
reg = <0x180 0xc>;
};
};
thermal-zones {
cpu_thermal: cpu_thermal {
polling-delay-passive = <1000>; /* ms */
polling-delay = <1000>; /* ms */
thermal-sensors = <&thermal>;
trips {
cpu_alert0: trip0 {
temperature = <85000>;
hysteresis = <2000>;
type = "passive";
};
cpu_alert1: trip1 {
temperature = <90000>;
hysteresis = <2000>;
type = "passive";
};
cpu_alert2: trip2 {
temperature = <95000>;
hysteresis = <2000>;
type = "passive";
};
cpu_alert3: trip3 {
temperature = <100000>;
hysteresis = <2000>;
type = "passive";
};
cpu_crit0: trip4 {
temperature = <105000>;
hysteresis = <2000>;
type = "critical";
};
};
cooling-maps {
map0 {
trip = <&cpu_alert0>;
cooling-device = <&cpu0 0 4>;
};
map1 {
trip = <&cpu_alert1>;
cooling-device = <&cpu0 0 3>;
};
map2 {
trip = <&cpu_alert2>;
cooling-device = <&cpu0 0 2>;
};
map3 {
trip = <&cpu_alert3>;
cooling-device = <&cpu0 0 1>;
};
};
};
};
};
&afe {
status = "okay";
mediatek,tdm-out-mode = <0>; // HDMI
};
&cpu0 {
proc-supply = <&mt6392_vproc_reg>;
};
&cpu1 {
proc-supply = <&mt6392_vproc_reg>;
};
&cpu2 {
proc-supply = <&mt6392_vproc_reg>;
};
&cpu3 {
proc-supply = <&mt6392_vproc_reg>;
};
&mt6392_pmic {
interrupt-parent = <&pio>;
interrupts = <28 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
#interrupt-cells = <2>;
};
&mt6392_vcamaf_reg {
regulator-min-microvolt = <3300000>;
regulator-always-on;
};
&mt6392_vgp1_reg {
regulator-min-microvolt = <3300000>;
regulator-always-on;
};
&mt6392_vgp2_reg {
regulator-min-microvolt = <3300000>;
regulator-always-on;
};
&mt6392_vmch_reg {
regulator-min-microvolt = <3300000>;
};
&mt6392_vmc_reg {
regulator-min-microvolt = <3300000>;
};
&uart0 {
status = "okay";
};
&pio {
i2c0_pins_a: i2c0 {
pins1 {
pinmux = <MT8167_PIN_58_SDA0__FUNC_SDA0_0>,
<MT8167_PIN_59_SCL0__FUNC_SCL0_0>;
bias-disable;
};
};
i2c1_pins_a: i2c1 {
pins1 {
pinmux = <MT8167_PIN_52_SDA1__FUNC_SDA1_0>,
<MT8167_PIN_53_SCL1__FUNC_SCL1_0>;
bias-disable;
};
};
i2c2_pins_a: i2c2 {
pins1 {
pinmux = <MT8167_PIN_60_SDA2__FUNC_GPIO60>,
<MT8167_PIN_61_SCL2__FUNC_GPIO61>;
bias-disable;
};
pins_a71ch_reset {
pinmux = <MT8516_PIN_23_EINT23__FUNC_GPIO23>;
output-high;
};
};
aud_pins_default: audiodefault {
pins1 {
pinmux = <MT8167_PIN_40_KPROW0__FUNC_GPIO40>;
input-enable;
bias-pull-up;
};
};
mmc0_pins_default: mmc0default {
pins_cmd_dat {
pinmux = <MT8167_PIN_120_MSDC0_DAT0__FUNC_MSDC0_DAT0>,
<MT8167_PIN_119_MSDC0_DAT1__FUNC_MSDC0_DAT1>,
<MT8167_PIN_118_MSDC0_DAT2__FUNC_MSDC0_DAT2>,
<MT8167_PIN_117_MSDC0_DAT3__FUNC_MSDC0_DAT3>,
<MT8167_PIN_113_MSDC0_DAT4__FUNC_MSDC0_DAT4>,
<MT8167_PIN_112_MSDC0_DAT5__FUNC_MSDC0_DAT5>,
<MT8167_PIN_111_MSDC0_DAT6__FUNC_MSDC0_DAT6>,
<MT8167_PIN_110_MSDC0_DAT7__FUNC_MSDC0_DAT7>,
<MT8167_PIN_115_MSDC0_CMD__FUNC_MSDC0_CMD>;
input-enable;
bias-pull-up;
};
pins_clk {
pinmux = <MT8167_PIN_116_MSDC0_CLK__FUNC_MSDC0_CLK>;
bias-pull-down;
};
pins_rst {
pinmux = <MT8167_PIN_114_MSDC0_RSTB__FUNC_MSDC0_RSTB>;
bias-pull-up;
};
pins_user {
pinmux = <MT8167_PIN_2_EINT2__FUNC_GPIO2>;
bias-pull-up;
};
};
mmc0_pins_uhs: mmc0@0{
pins_cmd_dat {
pinmux = <MT8167_PIN_120_MSDC0_DAT0__FUNC_MSDC0_DAT0>,
<MT8167_PIN_119_MSDC0_DAT1__FUNC_MSDC0_DAT1>,
<MT8167_PIN_118_MSDC0_DAT2__FUNC_MSDC0_DAT2>,
<MT8167_PIN_117_MSDC0_DAT3__FUNC_MSDC0_DAT3>,
<MT8167_PIN_113_MSDC0_DAT4__FUNC_MSDC0_DAT4>,
<MT8167_PIN_112_MSDC0_DAT5__FUNC_MSDC0_DAT5>,
<MT8167_PIN_111_MSDC0_DAT6__FUNC_MSDC0_DAT6>,
<MT8167_PIN_110_MSDC0_DAT7__FUNC_MSDC0_DAT7>,
<MT8167_PIN_115_MSDC0_CMD__FUNC_MSDC0_CMD>;
input-enable;
drive-strength = <MTK_DRIVE_6mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
};
pins_clk {
pinmux = <MT8167_PIN_116_MSDC0_CLK__FUNC_MSDC0_CLK>;
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
};
pins_rst {
pinmux = <MT8167_PIN_114_MSDC0_RSTB__FUNC_MSDC0_RSTB>;
bias-pull-up;
};
};
mmc1_pins_default: mmc1default {
pins_cmd_dat {
pinmux = <MT8167_PIN_106_MSDC1_DAT0__FUNC_MSDC1_DAT0>,
<MT8167_PIN_107_MSDC1_DAT1__FUNC_MSDC1_DAT1>,
<MT8167_PIN_108_MSDC1_DAT2__FUNC_MSDC1_DAT2>,
<MT8167_PIN_109_MSDC1_DAT3__FUNC_MSDC1_DAT3>,
<MT8167_PIN_104_MSDC1_CMD__FUNC_MSDC1_CMD>;
input-enable;
drive-strength = <MTK_DRIVE_6mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
};
pins_clk {
pinmux = <MT8167_PIN_105_MSDC1_CLK__FUNC_MSDC1_CLK>;
drive-strength = <MTK_DRIVE_6mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
};
pins_pmu_en {
pinmux = <MT8167_PIN_48_SPI_CS__FUNC_GPIO48>;
output-low;
};
pins_test_en {
pinmux = <MT8167_PIN_38_MRG_DI__FUNC_GPIO38>;
output-low;
};
pins_sys_rst {
pinmux = <MT8167_PIN_47_JTDO__FUNC_GPIO47>;
output-high;
};
};
mmc1_pins_uhs: mmc1@0 {
pins_cmd_dat {
pinmux = <MT8167_PIN_106_MSDC1_DAT0__FUNC_MSDC1_DAT0>,
<MT8167_PIN_107_MSDC1_DAT1__FUNC_MSDC1_DAT1>,
<MT8167_PIN_108_MSDC1_DAT2__FUNC_MSDC1_DAT2>,
<MT8167_PIN_109_MSDC1_DAT3__FUNC_MSDC1_DAT3>,
<MT8167_PIN_104_MSDC1_CMD__FUNC_MSDC1_CMD>;
input-enable;
drive-strength = <MTK_DRIVE_6mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
};
pins_clk {
pinmux = <MT8167_PIN_105_MSDC1_CLK__FUNC_MSDC1_CLK>;
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
};
pins_pmu_en {
pinmux = <MT8167_PIN_48_SPI_CS__FUNC_GPIO48>;
output-high;
};
pins_test_en {
pinmux = <MT8167_PIN_38_MRG_DI__FUNC_GPIO38>;
output-low;
};
pins_sys_rst {
pinmux = <MT8167_PIN_47_JTDO__FUNC_GPIO47>;
output-high;
};
};
mmc2_pins_default: mmc2default {
pins_cmd_dat {
pinmux = <MT8167_PIN_70_MSDC2_DAT0__FUNC_MSDC2_DAT0>,
<MT8167_PIN_71_MSDC2_DAT1__FUNC_MSDC2_DAT1>,
<MT8167_PIN_72_MSDC2_DAT2__FUNC_MSDC2_DAT2>,
<MT8167_PIN_73_MSDC2_DAT3__FUNC_MSDC2_DAT3>,
<MT8167_PIN_68_MSDC2_CMD__FUNC_MSDC2_CMD>;
input-enable;
drive-strength = <MTK_DRIVE_6mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
};
pins_clk {
pinmux = <MT8167_PIN_69_MSDC2_CLK__FUNC_MSDC2_CLK>;
drive-strength = <MTK_DRIVE_6mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
};
};
mmc2_pins_uhs: mmc2@0 {
pins_cmd_dat {
pinmux = <MT8167_PIN_70_MSDC2_DAT0__FUNC_MSDC2_DAT0>,
<MT8167_PIN_71_MSDC2_DAT1__FUNC_MSDC2_DAT1>,
<MT8167_PIN_72_MSDC2_DAT2__FUNC_MSDC2_DAT2>,
<MT8167_PIN_73_MSDC2_DAT3__FUNC_MSDC2_DAT3>,
<MT8167_PIN_68_MSDC2_CMD__FUNC_MSDC2_CMD>;
input-enable;
drive-strength = <MTK_DRIVE_6mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
};
pins_clk {
pinmux = <MT8167_PIN_69_MSDC2_CLK__FUNC_MSDC2_CLK>;
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
};
};
hdmi_pins_default: hdmi_pins_default {
};
hdmi_pins_hpd: hdmi_pins_hpd {
pins_cmd_dat {
pinmux = <MT8167_PIN_122_HTPLG__FUNC_HTPLG>;
bias-pull-down;
};
};
/* GA1600 GPIO start */
ga1600_boot_fail: boot_fail {
pins_cmd_dat {
pinmux = <MT8167_PIN_55_I2S_DATA_IN__FUNC_GPIO55>;
slew-rate = <1>;
input-enable;
bias-pull-up;
};
};
ga1600_pmic_en: pmic_en {
pins_cmd_dat {
pinmux = <MT8167_PIN_56_I2S_LRCK__FUNC_GPIO56>;
slew-rate = <1>;
output-high;
};
};
ga1600_reset_n: reset_n {
pins_cmd_dat {
pinmux = <MT8167_PIN_57_I2S_BCK__FUNC_GPIO57>;
slew-rate = <1>;
output-high;
};
};
/* GA1600 GPIO end */
};
&i2c0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins_a>;
clock-div = <2>;
};
&i2c1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins_a>;
clock-div = <2>;
};
&i2c2 {
status = "okay";
compatible = "i2c-gpio";
pinctrl-names = "default";
pinctrl-0 = <&i2c2_pins_a>;
sda-gpios = <&pio 60 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
scl-gpios = <&pio 61 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
};
&mmc0 {
pinctrl-names = "default", "state_uhs";
pinctrl-0 = <&mmc0_pins_default>;
pinctrl-1 = <&mmc0_pins_uhs>;
status = "okay";
bus-width = <8>;
max-frequency = <200000000>;
cap-mmc-highspeed;
mmc-hs200-1_8v;
cap-mmc-hw-reset;
vmmc-supply = <&mt6392_vemc3v3_reg>;
vqmmc-supply = <&mt6392_vio18_reg>;
non-removable;
};
&mmc1 {
status = "okay";
pinctrl-names = "default", "state_uhs";
pinctrl-0 = <&mmc1_pins_default>;
pinctrl-1 = <&mmc1_pins_uhs>;
vmmc-supply = <&mt6392_vemc3v3_reg>;
vqmmc-supply = <&mt6392_vio18_reg>;
bus-width = <4>;
max-frequency = <200000000>;
keep-power-in-suspend;
cap-sd-highspeed;
enable-sdio-wakeup;
sd-uhs-sdr50;
sd-uhs-sdr104;
cap-sdio-irq;
non-removable;
mt7668 {
wifi: mt7668-wifi@0 {
compatible = "mediatek,mt8516-wifi", "mediatek,mt7668-wifi";
mac-address = [00 00 00 00 00 00];
};
bluetooth: mt7668-bluetooth@0 {
compatible = "mediatek,mt8516-bluetooth", "mediatek,mt7668-bluetooth";
mac-address = [00 00 00 00 00 00];
};
};
};
&mmc2 {
pinctrl-names = "default", "state_uhs";
pinctrl-0 = <&mmc2_pins_default>;
pinctrl-1 = <&mmc2_pins_uhs>;
status = "okay";
bus-width = <4>;
max-frequency = <200000000>;
cap-sd-highspeed;
sd-uhs-sdr50;
sd-uhs-sdr104;
broken-cd;
vmmc-supply = <&mt6392_vmch_reg>;
vqmmc-supply = <&mt6392_vmc_reg>;
};
&dpi1 {
status = "okay";
ddc-i2c-bus = <&hdmiddc>;
port {
hdmi_connector_in: endpoint@0 {
remote-endpoint = <&hdmi_out>;
};
};
};
&hdmi_phy {
status = "okay";
};
&cec {
status = "okay";
};
&hdmi {
pinctrl-names = "default", "hdmi_hpd";
pinctrl-0 = <&hdmi_pins_default>;
pinctrl-1 = <&hdmi_pins_hpd>;
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
hdmi_out: endpoint {
remote-endpoint = <&hdmi_connector_in>;
};
};
};
};
&usb0 {
status = "okay";
dr_mode = "otg";
usb-role-switch;
vbus-supply = <&usb0_vbus>;
port {
usb0_role_switch: endpoint {
remote-endpoint = <&mt6392_typec_ep>;
};
};
};
&usb0_phy {
status = "okay";
};
&mt6392typec {
usb_con: connector {
compatible = "usb-c-connector";
label = "USB-C";
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
mt6392_typec_ep: endpoint {
remote-endpoint = <&usb0_role_switch>;
};
};
};
};
&usb1 {
status = "okay";
ga1600_pmic-supply = <&ga1600_pmic>;
};