tree 024bbb15ed230f23caace4d0178e19c461fb8af8
parent e366fdd72529c545ccf327569ee250c1673be221
parent 353dc6c47d67c83f7cc20334f8deb251674e6864
author Mike Turquette <mturquette@linaro.org> 1377035928 -0700
committer Mike Turquette <mturquette@linaro.org> 1377035928 -0700
mergetag object 353dc6c47d67c83f7cc20334f8deb251674e6864
 type commit
 tag zynq-clk-for-3.12
 tagger Michal Simek <michal.simek@xilinx.com> 1376978233 +0200
 
 arm: Xilinx Zynq clock changes for v3.12
 
 Just small two changes where the first fixes
 documentation and the second improves
 code readability.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.10 (GNU/Linux)
 
 iEYEABECAAYFAlITEOUACgkQykllyylKDCF/NACeL44IBsj0MLhdhJmPCZKbt6Iq
 wIMAn1jLwzIUnKug6TuT3GzsNnrrNaCi
 =1u+P
 -----END PGP SIGNATURE-----

Merge tag 'zynq-clk-for-3.12' of git://git.xilinx.com/linux-xlnx into clk-next

arm: Xilinx Zynq clock changes for v3.12

Just small two changes where the first fixes
documentation and the second improves
code readability.