tree 89fe25c901631b6c8bc4a1ba4c14dd1c3e30b8ab
parent 9dddd478d4883deb1f5b6d3fcea681c9c9e90708
author Vivien Didelot <vivien.didelot@savoirfairelinux.com> 1466442851 -0400
committer David S. Miller <davem@davemloft.net> 1466495910 -0400

net: dsa: mv88e6xxx: abstract switch registers accesses

When the SMI address of the switch chip is zero, the chip assumes to be
the only one on the SMI master bus and thus responds to all its known
SMI devices addresses (port registers, Global2, etc.)

When its SMI address is not zero, some chips (e.g. 88E6352) use an
indirect access through two SMI Command and Data registers.

Other models (e.g. 88E6060) using less than 16 internal SMI addresses
always use a direct access.

Add a capability flag to describe chips supporting the (indirect)
Multi-chip Addressing Mode, and a low-level API to access the registers
via SMI.

Other accesses (like Ethernet management frames) may be added later.

Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>