ARM: at91: sparse irq support
Enable sparse irq support for multisoc image. It involves to add the
NR_IRQS_LEGACY offset to static SoC irq number definitions since NR_IRQS_LEGACY
irq descs are allocated before AIC requests irq descs allocation.
Move NR_AIC_IRQS macro to a more appropiate place with the purpose to
remove mach/irqs.h later.
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c
index 175e000..eb6bbf8 100644
--- a/arch/arm/mach-at91/at91sam9263_devices.c
+++ b/arch/arm/mach-at91/at91sam9263_devices.c
@@ -44,8 +44,8 @@
.flags = IORESOURCE_MEM,
},
[1] = {
- .start = AT91SAM9263_ID_UHP,
- .end = AT91SAM9263_ID_UHP,
+ .start = NR_IRQS_LEGACY + AT91SAM9263_ID_UHP,
+ .end = NR_IRQS_LEGACY + AT91SAM9263_ID_UHP,
.flags = IORESOURCE_IRQ,
},
};
@@ -104,8 +104,8 @@
.flags = IORESOURCE_MEM,
},
[1] = {
- .start = AT91SAM9263_ID_UDP,
- .end = AT91SAM9263_ID_UDP,
+ .start = NR_IRQS_LEGACY + AT91SAM9263_ID_UDP,
+ .end = NR_IRQS_LEGACY + AT91SAM9263_ID_UDP,
.flags = IORESOURCE_IRQ,
},
};
@@ -155,8 +155,8 @@
.flags = IORESOURCE_MEM,
},
[1] = {
- .start = AT91SAM9263_ID_EMAC,
- .end = AT91SAM9263_ID_EMAC,
+ .start = NR_IRQS_LEGACY + AT91SAM9263_ID_EMAC,
+ .end = NR_IRQS_LEGACY + AT91SAM9263_ID_EMAC,
.flags = IORESOURCE_IRQ,
},
};
@@ -229,8 +229,8 @@
.flags = IORESOURCE_MEM,
},
[1] = {
- .start = AT91SAM9263_ID_MCI0,
- .end = AT91SAM9263_ID_MCI0,
+ .start = NR_IRQS_LEGACY + AT91SAM9263_ID_MCI0,
+ .end = NR_IRQS_LEGACY + AT91SAM9263_ID_MCI0,
.flags = IORESOURCE_IRQ,
},
};
@@ -254,8 +254,8 @@
.flags = IORESOURCE_MEM,
},
[1] = {
- .start = AT91SAM9263_ID_MCI1,
- .end = AT91SAM9263_ID_MCI1,
+ .start = NR_IRQS_LEGACY + AT91SAM9263_ID_MCI1,
+ .end = NR_IRQS_LEGACY + AT91SAM9263_ID_MCI1,
.flags = IORESOURCE_IRQ,
},
};
@@ -567,8 +567,8 @@
.flags = IORESOURCE_MEM,
},
[1] = {
- .start = AT91SAM9263_ID_TWI,
- .end = AT91SAM9263_ID_TWI,
+ .start = NR_IRQS_LEGACY + AT91SAM9263_ID_TWI,
+ .end = NR_IRQS_LEGACY + AT91SAM9263_ID_TWI,
.flags = IORESOURCE_IRQ,
},
};
@@ -611,8 +611,8 @@
.flags = IORESOURCE_MEM,
},
[1] = {
- .start = AT91SAM9263_ID_SPI0,
- .end = AT91SAM9263_ID_SPI0,
+ .start = NR_IRQS_LEGACY + AT91SAM9263_ID_SPI0,
+ .end = NR_IRQS_LEGACY + AT91SAM9263_ID_SPI0,
.flags = IORESOURCE_IRQ,
},
};
@@ -637,8 +637,8 @@
.flags = IORESOURCE_MEM,
},
[1] = {
- .start = AT91SAM9263_ID_SPI1,
- .end = AT91SAM9263_ID_SPI1,
+ .start = NR_IRQS_LEGACY + AT91SAM9263_ID_SPI1,
+ .end = NR_IRQS_LEGACY + AT91SAM9263_ID_SPI1,
.flags = IORESOURCE_IRQ,
},
};
@@ -725,8 +725,8 @@
.flags = IORESOURCE_MEM,
},
[1] = {
- .start = AT91SAM9263_ID_AC97C,
- .end = AT91SAM9263_ID_AC97C,
+ .start = NR_IRQS_LEGACY + AT91SAM9263_ID_AC97C,
+ .end = NR_IRQS_LEGACY + AT91SAM9263_ID_AC97C,
.flags = IORESOURCE_IRQ,
},
};
@@ -776,8 +776,8 @@
.flags = IORESOURCE_MEM,
},
[1] = {
- .start = AT91SAM9263_ID_CAN,
- .end = AT91SAM9263_ID_CAN,
+ .start = NR_IRQS_LEGACY + AT91SAM9263_ID_CAN,
+ .end = NR_IRQS_LEGACY + AT91SAM9263_ID_CAN,
.flags = IORESOURCE_IRQ,
},
};
@@ -816,8 +816,8 @@
.flags = IORESOURCE_MEM,
},
[1] = {
- .start = AT91SAM9263_ID_LCDC,
- .end = AT91SAM9263_ID_LCDC,
+ .start = NR_IRQS_LEGACY + AT91SAM9263_ID_LCDC,
+ .end = NR_IRQS_LEGACY + AT91SAM9263_ID_LCDC,
.flags = IORESOURCE_IRQ,
},
};
@@ -883,8 +883,8 @@
.flags = IORESOURCE_MEM,
},
[1] = {
- .start = AT91SAM9263_ID_ISI,
- .end = AT91SAM9263_ID_ISI,
+ .start = NR_IRQS_LEGACY + AT91SAM9263_ID_ISI,
+ .end = NR_IRQS_LEGACY + AT91SAM9263_ID_ISI,
.flags = IORESOURCE_IRQ,
},
};
@@ -940,8 +940,8 @@
.flags = IORESOURCE_MEM,
},
[1] = {
- .start = AT91SAM9263_ID_TCB,
- .end = AT91SAM9263_ID_TCB,
+ .start = NR_IRQS_LEGACY + AT91SAM9263_ID_TCB,
+ .end = NR_IRQS_LEGACY + AT91SAM9263_ID_TCB,
.flags = IORESOURCE_IRQ,
},
};
@@ -1108,8 +1108,8 @@
.flags = IORESOURCE_MEM,
},
[1] = {
- .start = AT91SAM9263_ID_PWMC,
- .end = AT91SAM9263_ID_PWMC,
+ .start = NR_IRQS_LEGACY + AT91SAM9263_ID_PWMC,
+ .end = NR_IRQS_LEGACY + AT91SAM9263_ID_PWMC,
.flags = IORESOURCE_IRQ,
},
};
@@ -1161,8 +1161,8 @@
.flags = IORESOURCE_MEM,
},
[1] = {
- .start = AT91SAM9263_ID_SSC0,
- .end = AT91SAM9263_ID_SSC0,
+ .start = NR_IRQS_LEGACY + AT91SAM9263_ID_SSC0,
+ .end = NR_IRQS_LEGACY + AT91SAM9263_ID_SSC0,
.flags = IORESOURCE_IRQ,
},
};
@@ -1203,8 +1203,8 @@
.flags = IORESOURCE_MEM,
},
[1] = {
- .start = AT91SAM9263_ID_SSC1,
- .end = AT91SAM9263_ID_SSC1,
+ .start = NR_IRQS_LEGACY + AT91SAM9263_ID_SSC1,
+ .end = NR_IRQS_LEGACY + AT91SAM9263_ID_SSC1,
.flags = IORESOURCE_IRQ,
},
};
@@ -1284,8 +1284,8 @@
.flags = IORESOURCE_MEM,
},
[1] = {
- .start = AT91_ID_SYS,
- .end = AT91_ID_SYS,
+ .start = NR_IRQS_LEGACY + AT91_ID_SYS,
+ .end = NR_IRQS_LEGACY + AT91_ID_SYS,
.flags = IORESOURCE_IRQ,
},
};
@@ -1322,8 +1322,8 @@
.flags = IORESOURCE_MEM,
},
[1] = {
- .start = AT91SAM9263_ID_US0,
- .end = AT91SAM9263_ID_US0,
+ .start = NR_IRQS_LEGACY + AT91SAM9263_ID_US0,
+ .end = NR_IRQS_LEGACY + AT91SAM9263_ID_US0,
.flags = IORESOURCE_IRQ,
},
};
@@ -1365,8 +1365,8 @@
.flags = IORESOURCE_MEM,
},
[1] = {
- .start = AT91SAM9263_ID_US1,
- .end = AT91SAM9263_ID_US1,
+ .start = NR_IRQS_LEGACY + AT91SAM9263_ID_US1,
+ .end = NR_IRQS_LEGACY + AT91SAM9263_ID_US1,
.flags = IORESOURCE_IRQ,
},
};
@@ -1408,8 +1408,8 @@
.flags = IORESOURCE_MEM,
},
[1] = {
- .start = AT91SAM9263_ID_US2,
- .end = AT91SAM9263_ID_US2,
+ .start = NR_IRQS_LEGACY + AT91SAM9263_ID_US2,
+ .end = NR_IRQS_LEGACY + AT91SAM9263_ID_US2,
.flags = IORESOURCE_IRQ,
},
};
