tree 6cfeb73936730711aa90b1c371a563a635cbaaf2
parent aa493737d8e2b7d4393a94479eec63381f842daa
author Paul Burton <paul.burton@imgtec.com> 1503090141 -0700
committer Ralf Baechle <ralf@linux-mips.org> 1504525995 +0200

irqchip: mips-gic: Use pcpu_masks to avoid reading GIC_SH_MASK*

This patch avoids the need to read the GIC_SH_MASK* registers when
decoding shared interrupts by setting & clearing the interrupt's bit in
the appropriate CPU's pcpu_masks entry when masking or unmasking the
interrupt.

This effectively means that whilst an interrupt is masked we clear its
bit in all pcpu_masks, which causes gic_handle_shared_int() to ignore it
on all CPUs without needing to check GIC_SH_MASK*.

In essence, we add a little overhead to masking or unmasking interrupts
but in return reduce the overhead of the far more common task of
decoding interrupts.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/17109/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>