[ARM] Remove yucky ifdefs to print "id(wb)BRR" suffix on CPU name
The "id(wb)BRR" suffix reports which CPU debugging options were (or
were not) selected at kernel build time. Rather than have every
proc-*.S file implement this, report the control register value,
from which this information can be deduced.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index 093ccba..7d02f96 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -315,9 +315,9 @@
cpu_cache = *list->cache;
#endif
- printk("CPU: %s [%08x] revision %d (ARMv%s)\n",
+ printk("CPU: %s [%08x] revision %d (ARMv%s), cr=%08x\n",
cpu_name, processor_id, (int)processor_id & 15,
- proc_arch[cpu_architecture()]);
+ proc_arch[cpu_architecture()], cr_alignment);
sprintf(system_utsname.machine, "%s%c", list->arch_name, ENDIANNESS);
sprintf(elf_platform, "%s%c", list->elf_name, ENDIANNESS);
diff --git a/arch/arm/mm/proc-arm1020e.S b/arch/arm/mm/proc-arm1020e.S
index bcd5ee0..8c7e25f 100644
--- a/arch/arm/mm/proc-arm1020e.S
+++ b/arch/arm/mm/proc-arm1020e.S
@@ -477,25 +477,7 @@
.type cpu_arm1020e_name, #object
cpu_arm1020e_name:
- .ascii "ARM1020E"
-#ifndef CONFIG_CPU_ICACHE_DISABLE
- .ascii "i"
-#endif
-#ifndef CONFIG_CPU_DCACHE_DISABLE
- .ascii "d"
-#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
- .ascii "(wt)"
-#else
- .ascii "(wb)"
-#endif
-#endif
-#ifndef CONFIG_CPU_BPREDICT_DISABLE
- .ascii "B"
-#endif
-#ifdef CONFIG_CPU_CACHE_ROUND_ROBIN
- .ascii "RR"
-#endif
- .ascii "\0"
+ .asciz "ARM1020E"
.size cpu_arm1020e_name, . - cpu_arm1020e_name
.align
diff --git a/arch/arm/mm/proc-arm1022.S b/arch/arm/mm/proc-arm1022.S
index b0ccff4..92218e6 100644
--- a/arch/arm/mm/proc-arm1022.S
+++ b/arch/arm/mm/proc-arm1022.S
@@ -460,25 +460,7 @@
.type cpu_arm1022_name, #object
cpu_arm1022_name:
- .ascii "arm1022"
-#ifndef CONFIG_CPU_ICACHE_DISABLE
- .ascii "i"
-#endif
-#ifndef CONFIG_CPU_DCACHE_DISABLE
- .ascii "d"
-#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
- .ascii "(wt)"
-#else
- .ascii "(wb)"
-#endif
-#endif
-#ifndef CONFIG_CPU_BPREDICT_DISABLE
- .ascii "B"
-#endif
-#ifdef CONFIG_CPU_CACHE_ROUND_ROBIN
- .ascii "RR"
-#endif
- .ascii "\0"
+ .asciz "ARM1022"
.size cpu_arm1022_name, . - cpu_arm1022_name
.align
diff --git a/arch/arm/mm/proc-arm1026.S b/arch/arm/mm/proc-arm1026.S
index abe850c..2796c8e 100644
--- a/arch/arm/mm/proc-arm1026.S
+++ b/arch/arm/mm/proc-arm1026.S
@@ -456,25 +456,7 @@
.type cpu_arm1026_name, #object
cpu_arm1026_name:
- .ascii "ARM1026EJ-S"
-#ifndef CONFIG_CPU_ICACHE_DISABLE
- .ascii "i"
-#endif
-#ifndef CONFIG_CPU_DCACHE_DISABLE
- .ascii "d"
-#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
- .ascii "(wt)"
-#else
- .ascii "(wb)"
-#endif
-#endif
-#ifndef CONFIG_CPU_BPREDICT_DISABLE
- .ascii "B"
-#endif
-#ifdef CONFIG_CPU_CACHE_ROUND_ROBIN
- .ascii "RR"
-#endif
- .ascii "\0"
+ .asciz "ARM1026EJ-S"
.size cpu_arm1026_name, . - cpu_arm1026_name
.align
diff --git a/arch/arm/mm/proc-arm920.S b/arch/arm/mm/proc-arm920.S
index 31dc839b..02af3e2 100644
--- a/arch/arm/mm/proc-arm920.S
+++ b/arch/arm/mm/proc-arm920.S
@@ -444,19 +444,7 @@
.type cpu_arm920_name, #object
cpu_arm920_name:
- .ascii "ARM920T"
-#ifndef CONFIG_CPU_ICACHE_DISABLE
- .ascii "i"
-#endif
-#ifndef CONFIG_CPU_DCACHE_DISABLE
- .ascii "d"
-#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
- .ascii "(wt)"
-#else
- .ascii "(wb)"
-#endif
-#endif
- .ascii "\0"
+ .asciz "ARM920T"
.size cpu_arm920_name, . - cpu_arm920_name
.align
diff --git a/arch/arm/mm/proc-arm922.S b/arch/arm/mm/proc-arm922.S
index 9e57c34f..33dae49 100644
--- a/arch/arm/mm/proc-arm922.S
+++ b/arch/arm/mm/proc-arm922.S
@@ -448,19 +448,7 @@
.type cpu_arm922_name, #object
cpu_arm922_name:
- .ascii "ARM922T"
-#ifndef CONFIG_CPU_ICACHE_DISABLE
- .ascii "i"
-#endif
-#ifndef CONFIG_CPU_DCACHE_DISABLE
- .ascii "d"
-#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
- .ascii "(wt)"
-#else
- .ascii "(wb)"
-#endif
-#endif
- .ascii "\0"
+ .asciz "ARM922T"
.size cpu_arm922_name, . - cpu_arm922_name
.align
diff --git a/arch/arm/mm/proc-arm925.S b/arch/arm/mm/proc-arm925.S
index 8d47c9f..aaa9f98 100644
--- a/arch/arm/mm/proc-arm925.S
+++ b/arch/arm/mm/proc-arm925.S
@@ -511,22 +511,7 @@
.type cpu_arm925_name, #object
cpu_arm925_name:
- .ascii "ARM925T"
-#ifndef CONFIG_CPU_ICACHE_DISABLE
- .ascii "i"
-#endif
-#ifndef CONFIG_CPU_DCACHE_DISABLE
- .ascii "d"
-#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
- .ascii "(wt)"
-#else
- .ascii "(wb)"
-#endif
-#ifdef CONFIG_CPU_CACHE_ROUND_ROBIN
- .ascii "RR"
-#endif
-#endif
- .ascii "\0"
+ .asciz "ARM925T"
.size cpu_arm925_name, . - cpu_arm925_name
.align
diff --git a/arch/arm/mm/proc-arm926.S b/arch/arm/mm/proc-arm926.S
index cb4d8f3..ce246dd 100644
--- a/arch/arm/mm/proc-arm926.S
+++ b/arch/arm/mm/proc-arm926.S
@@ -460,22 +460,7 @@
.type cpu_arm926_name, #object
cpu_arm926_name:
- .ascii "ARM926EJ-S"
-#ifndef CONFIG_CPU_ICACHE_DISABLE
- .ascii "i"
-#endif
-#ifndef CONFIG_CPU_DCACHE_DISABLE
- .ascii "d"
-#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
- .ascii "(wt)"
-#else
- .ascii "(wb)"
-#endif
-#ifdef CONFIG_CPU_CACHE_ROUND_ROBIN
- .ascii "RR"
-#endif
-#endif
- .ascii "\0"
+ .asciz "ARM926EJ-S"
.size cpu_arm926_name, . - cpu_arm926_name
.align
