| commit | 05b57273acb360d9fe5f8b8029890487e819871b | [log] [tgz] |
|---|---|---|
| author | Shawn Lin <shawn.lin@rock-chips.com> | Wed Jul 19 17:57:58 2017 +0800 |
| committer | Bjorn Helgaas <bhelgaas@google.com> | Tue Aug 29 13:18:05 2017 -0500 |
| tree | e9f50fbadddb46d0405e2091ae029f1e66d39e1d | |
| parent | 7a55b57031b3e97bbdfe8d378e4c6989341de7be [diff] |
dt-bindings: phy-rockchip-pcie: Convert to per-lane PHY model Deprecate the legacy Rockchip PCIe PHY and encourage users to use per-lane PHY mode by setting #phy-cells to 1. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Brian Norris <briannorris@chromium.org> Acked-by: Rob Herring <robh@kernel.org>