/*
 * Copyright 2017 NXP
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version 2
 * of the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#include "fsl-imx8qm-lpddr4-arm2.dts"

&iomuxc {

	imx8qm-arm2 {

		pinctrl_lpspi0: lpspi0grp {
			fsl,pins = <
				SC_P_SPI0_SCK_DMA_SPI0_SCK		0x0600004c
				SC_P_SPI0_SDO_DMA_SPI0_SDO		0x0600004c
				SC_P_SPI0_SDI_DMA_SPI0_SDI		0x0600004c
			>;
		};

		pinctrl_lpspi0_cs: lpspi0cs {
			fsl,pins = <
				SC_P_SPI0_CS0_LSIO_GPIO3_IO05		0x21
			>;
		};

		pinctrl_lpspi3: lpspi3grp {
			fsl,pins = <
				SC_P_SPI3_SCK_DMA_SPI3_SCK		0x0600004c
				SC_P_SPI3_SDO_DMA_SPI3_SDO		0x0600004c
				SC_P_SPI3_SDI_DMA_SPI3_SDI		0x0600004c
				SC_P_SPI3_CS0_DMA_SPI3_CS0		0x0600004c
			>;
		};

	};
};

&lpspi0 {
	#address-cells = <1>;
	#size-cells = <0>;
	fsl,spi-num-chipselects = <1>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_lpspi0 &pinctrl_lpspi0_cs>;
	cs-gpios = <&gpio3 5 GPIO_ACTIVE_LOW>;
	status = "okay";

	flash: at45db041e@0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "atmel,at45", "atmel,dataflash";
		spi-max-frequency = <5000000>;
		reg = <0>;
        };
};

&lpspi3 {
	#address-cells = <1>;
	#size-cells = <0>;
	fsl,spi-num-chipselects = <1>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_lpspi3>;
	status = "okay";

	spidev0: spi@0 {
		reg = <0>;
		compatible = "rohm,dh2228fv";
		spi-max-frequency = <30000000>;
	};

};