commit | ab2b2e4f8b24b789eba2f95394210b644a6fcc44 | [log] [tgz] |
---|---|---|
author | Frank Min <Frank.Min@amd.com> | Mon Jun 12 10:53:19 2017 +0800 |
committer | Alex Deucher <alexander.deucher@amd.com> | Tue Aug 15 14:45:45 2017 -0400 |
tree | 53fcd7b4af73546813cba7efdce01371b4647f52 | |
parent | 330df03b3abf944f8f5180f2abc61367749984c0 [diff] |
drm/amdgpu: Clear vce&uvd ring wptr for SRIOV MMSCH FW need to get the wptr from 0 after it get the mailbox request from driver, since every time kick the mailbox, mmsch thinks that it is the first time engine start to initialize. Signed-off-by: Frank Min <Frank.Min@amd.com> Signed-off-by: Xiangliang.Yu <Xiangliang.Yu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>