commit 4d0e05eb2a611eef83609678de27f45a9a3ad806
author Hawking Zhang <Hawking.Zhang@amd.com> Sat May 27 14:49:19 2017 +0800
committer Alex Deucher <alexander.deucher@amd.com> Fri Aug 04 08:25:00 2017 -0400
tree 0947205e528c286ee6def910dfa27426eda2c3d5
parent 517df5f5134af207c90ac92185dc8c7ed5a86f92

tests/amdgpu: bypass VCE tests on raven

raven doesn't support VCE

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Xiaojie Yuan <Xiaojie.Yuan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

tests/amdgpu/vce_tests.c

diff --git a/tests/amdgpu/vce_tests.c b/tests/amdgpu/vce_tests.c
index b03807b..8d61a3b 100644
--- a/tests/amdgpu/vce_tests.c
+++ b/tests/amdgpu/vce_tests.c
@@ -106,6 +106,11 @@
 	family_id = device_handle->info.family_id;
 	vce_harvest_config = device_handle->info.vce_harvest_config;
 
+	if (family_id >= AMDGPU_FAMILY_RV) {
+		printf("\n\nThe ASIC NOT support VCE, all sub-tests will pass\n");
+		return CUE_SUCCESS;
+	}
+
 	r = amdgpu_cs_ctx_create(device_handle, &context_handle);
 	if (r)
 		return CUE_SINIT_FAILED;
@@ -126,6 +131,9 @@
 {
 	int r;
 
+	if (family_id >= AMDGPU_FAMILY_RV)
+		return CUE_SUCCESS;
+
 	r = amdgpu_bo_unmap_and_free(ib_handle, ib_va_handle,
 				     ib_mc_address, IB_SIZE);
 	if (r)
@@ -237,6 +245,9 @@
 	unsigned align = (family_id >= AMDGPU_FAMILY_AI) ? 256 : 16;
 	int len, r;
 
+	if (family_id >= AMDGPU_FAMILY_RV)
+		return;
+
 	enc.width = vce_create[6];
 	enc.height = vce_create[7];
 
@@ -430,6 +441,9 @@
 	unsigned align = (family_id >= AMDGPU_FAMILY_AI) ? 256 : 16;
 	int i, r;
 
+	if (family_id >= AMDGPU_FAMILY_RV)
+		return;
+
 	vbuf_size = ALIGN(enc.width, align) * ALIGN(enc.height, 16) * 1.5;
 	cpb_size = vbuf_size * 10;
 	num_resources = 0;
@@ -508,6 +522,9 @@
 {
 	int len, r;
 
+	if (family_id >= AMDGPU_FAMILY_RV)
+		return;
+
 	num_resources  = 0;
 	alloc_resource(&enc.fb[0], 4096, AMDGPU_GEM_DOMAIN_GTT);
 	resources[num_resources++] = enc.fb[0].handle;