Fix derating conflict issue
Applying patch fix-derating-conflict-issue-L4.14.98_GA2.0.0.patch
received from Frank at NXP on Nov 20, 2020.
Change-Id: I518ca7563f5d724c2f6b86cedeb35507742df358
diff --git a/plat/imx/common/imx8m/lpddr4_dvfs.c b/plat/imx/common/imx8m/lpddr4_dvfs.c
index b3ea27b..502b0f8 100644
--- a/plat/imx/common/imx8m/lpddr4_dvfs.c
+++ b/plat/imx/common/imx8m/lpddr4_dvfs.c
@@ -20,6 +20,7 @@
unsigned int mr, emr, emr2, emr3;
unsigned int mr11, mr12, mr22, mr14;
unsigned int tmp;
+ unsigned int derate_backup[3];
/* 1. program targetd UMCTL2_REGS_FREQ1/2/3,already done, skip it. */
@@ -109,14 +110,17 @@
/* 10. Disable automatic derating: derate_enable */
tmp= mmio_read_32(DDRC_DERATEEN(0));
+ derate_backup[0] = tmp;
tmp &= ~0x1;
mmio_write_32(DDRC_DERATEEN(0), tmp);
tmp= mmio_read_32(DDRC_FREQ1_DERATEEN(0));
+ derate_backup[1] = tmp;
tmp &= ~0x1;
mmio_write_32(DDRC_FREQ1_DERATEEN(0), tmp);
tmp= mmio_read_32(DDRC_FREQ2_DERATEEN(0));
+ derate_backup[2] = tmp;
tmp &= ~0x1;
mmio_write_32(DDRC_FREQ2_DERATEEN(0), tmp);
@@ -347,9 +351,12 @@
}
/* 40. re-emable automatic derating: derate_enable */
- tmp= mmio_read_32(DDRC_DERATEEN(0));
- tmp &= 0xFFFFFFFE;
- mmio_write_32(DDRC_DERATEEN(0), tmp);
+ //tmp= mmio_read_32(DDRC_DERATEEN(0));
+ //tmp &= 0xFFFFFFFE;
+ //mmio_write_32(DDRC_DERATEEN(0), tmp);
+ mmio_write_32(DDRC_DERATEEN(0), derate_backup[0]);
+ mmio_write_32(DDRC_FREQ1_DERATEEN(0), derate_backup[1]);
+ mmio_write_32(DDRC_FREQ2_DERATEEN(0), derate_backup[2]);
/* 41. write 1 to PCTRL.port_en */
mmio_write_32(DDRC_PCTRL_0(0), 0x1);
diff --git a/plat/imx/common/imx8m/lpddr4_retention.c b/plat/imx/common/imx8m/lpddr4_retention.c
index 8cc44c8..f09f9b7 100644
--- a/plat/imx/common/imx8m/lpddr4_retention.c
+++ b/plat/imx/common/imx8m/lpddr4_retention.c
@@ -250,7 +250,7 @@
INFO("wait STAT to normal state\n");
}
- mmio_write_32(DDRC_DERATEEN(0), 0x00000302);
+ //mmio_write_32(DDRC_DERATEEN(0), 0x00000302);
mmio_write_32(DDRC_PCTRL_0(0), 0x00000001);
/* dis_auto-refresh is set to 0 */