plat: imx8mm: fix system resume hang when tz380 is enabled
If NOC is power down in DSM mode, the tz380 register config
will be lost, so we must re-init the tz380 after system resume.
the tz380 initialization must be done after DRAM has been out
of retention.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
(cherry picked from commit 218a3b4ed269cbe5fc932767e6077d158761fc29)
diff --git a/plat/imx/imx8mm/gpc.c b/plat/imx/imx8mm/gpc.c
index c022402..fa7faf7 100644
--- a/plat/imx/imx8mm/gpc.c
+++ b/plat/imx/imx8mm/gpc.c
@@ -16,6 +16,7 @@
#include <platform_def.h>
#include <psci.h>
#include <imx_sip.h>
+#include <tzc380.h>
#include <soc.h>
#include <delay_timer.h>
@@ -532,6 +533,23 @@
mmio_write_32(IMX_ANAMIX_BASE + 0x114, mmio_read_32(IMX_ANAMIX_BASE + 0x114) & ~0x500);
}
+#define GPR_TZASC_EN (1 << 0)
+#define GPR_TZASC_EN_LOCK (1 << 16)
+
+static void imx8mm_tz380_init(void)
+{
+ unsigned int val;
+
+ val = mmio_read_32(IMX_IOMUX_GPR_BASE + 0x28);
+ if ((val & GPR_TZASC_EN) != GPR_TZASC_EN)
+ return;
+
+ tzc380_init(IMX_TZASC_BASE);
+
+ /* Enable 1G-5G S/NS RW */
+ tzc380_configure_region(0, 0x00000000, TZC_ATTR_REGION_SIZE(TZC_REGION_SIZE_4G) | TZC_ATTR_REGION_EN_MASK | TZC_ATTR_SP_ALL);
+}
+
void noc_wrapper_pre_suspend(unsigned int proc_num)
{
uint32_t val;
@@ -572,9 +590,12 @@
mmio_write_32(IMX_GPC_BASE + MST_CPU_MAPPING, val);
/* noc can only be power down when all the pu domain is off */
- if (!pu_domain_status)
+ if (!pu_domain_status) {
+ /* re-init the tz380 if resume from noc power down */
+ imx8mm_tz380_init();
/* disable noc power down */
imx_noc_slot_config(false);
+ }
/* restore gic context */
plat_gic_restore(proc_num, &imx_gicv3_ctx);
diff --git a/plat/imx/imx8mm/imx8mm_psci.c b/plat/imx/imx8mm/imx8mm_psci.c
index 893001c..5b5a55a 100644
--- a/plat/imx/imx8mm/imx8mm_psci.c
+++ b/plat/imx/imx8mm/imx8mm_psci.c
@@ -142,9 +142,9 @@
/* clear the system wakeup setting */
imx_set_sys_wakeup(core_id, false);
imx_anamix_post_resume();
- noc_wrapper_post_resume(core_id);
imx_clear_rbc_count();
dram_exit_retention();
+ noc_wrapper_post_resume(core_id);
}
/* check the cluster level power status */
