commit f58d6945b4f28020adadd914006689c2e96dd489
author Leonid Lobachev <leonidl@google.com> Wed Mar 27 16:08:59 2019 -0700
committer Leonid Lobachev <leonidl@google.com> Wed Mar 27 16:08:59 2019 -0700
tree 7c283544780a9d351047d938d5d2123c1e585022
parent 546aad81323aa44b3b8b65c3764a70511f341cf1

imx8mq: update chip revision method for B1

i.MX8MQ B1's chip revision is identified by reading
OCOTP offset 0x40, the magic number 0xff0055aa is
for B1.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
(cherry picked from commit 701e7961dfe568d724343c4e2897907cb34cc276)

Change-Id: Iff98cfa0f7ce1bb0cdfacfcceff6895165d291b5

plat/freescale/imx8mq/include/platform_def.h

diff --git a/plat/freescale/imx8mq/include/platform_def.h b/plat/freescale/imx8mq/include/platform_def.h
index 117e901..e7913cf 100644
--- a/plat/freescale/imx8mq/include/platform_def.h
+++ b/plat/freescale/imx8mq/include/platform_def.h
@@ -51,6 +51,7 @@
 #define IMX_AIPS1_BASE			0x30200000
 #define IMX_AIPS3_ARB_BASE		0x30800000
 #define IMX_ANAMIX_BASE			0x30360000
+#define IMX_OCOTP_BASE			0x30350000
 #define IMX_CCM_BASE			0x30380000
 #define IMX_SRC_BASE			0x30390000
 #define IMX_GPC_BASE			0x303a0000

plat/freescale/imx8mq/src.c

diff --git a/plat/freescale/imx8mq/src.c b/plat/freescale/imx8mq/src.c
index a9f1185..83de840 100644
--- a/plat/freescale/imx8mq/src.c
+++ b/plat/freescale/imx8mq/src.c
@@ -24,6 +24,7 @@
 #define DIGPROG		0x6c
 #define SW_INFO_A0	0x800
 #define SW_INFO_B0	0x83C
+#define SW_INFO_B1	0x40
 
 int imx_src_handler(uint32_t smc_fid, u_register_t x1, u_register_t x2,
 		    u_register_t x3)
@@ -58,9 +59,13 @@
 	rom_version = mmio_read_8(IMX_ROM_BASE + SW_INFO_A0);
 	if (rom_version != 0x10) {
 		rom_version = mmio_read_8(IMX_ROM_BASE + SW_INFO_B0);
-		if (rom_version >= 0x20) {
+		if (rom_version == 0x20) {
 			val &= ~0xff;
 			val |= rom_version;
+		} else if (mmio_read_32(IMX_OCOTP_BASE + SW_INFO_B1)) {
+			   == 0xff0055aa) {
+			/* 0xff0055aa is magic number for B1 */
+			val = 0x21;
 		}
 	}