tree 90df640ec814b16d6b7448983390c8a266fb10a9
parent 854729ba8d89dd4bcbd2c98d513416c318d8c121
author Anson Huang <Anson.Huang@nxp.com> 1549954714 +0800
committer Anson Huang <Anson.Huang@nxp.com> 1549958058 +0800

gic: make sure ProcessorSleep bit clear successfully

GICR_WAKER.ProcessorSleep can only be set to zero when:
— GICR_WAKER.Sleep bit[0] == 0.
— GICR_WAKER.Quiescent bit[31] == 0.

On some platforms, when system reboot with GIC in sleep
mode but with power ON, such as on NXP's i.MX8QM, Linux
kernel enters suspend but could be requested to reboot,
and GIC is in sleep mode and it is inside a power domain
which is ON in this scenario, when CPU reset, the GIC
driver trys to set CORE's redistributor interface to awake,
with GICR_WAKER.Sleep bit[0] and GICR_WAKER.Quiescent bit[31]
both set, the ProcessorSleep bit[1] will never be clear
and cause system hang.

This patch makes sure GICR_WAKER.Sleep bit[0] and
GICR_WAKER.Quiescent bit[31] are both zeor before clearing
ProcessorSleep bit[1].

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
(cherry picked from commit 4436f3a49a47a778d7a30afb6ef2b0ef3f1f21c5)