tree e01e53746a8350773e0a534f706f1c7365fe78fc
parent e4cc6e1ed6cb770fc4c854b527c5f917e42a1626
author Bai Ping <ping.bai@nxp.com> 1534757541 +0800
committer Jacky Bai <ping.bai@nxp.com> 1548413477 +0800

MLK-19256 plat: imx8mm: correct dram apb clock rate dvfs

The DRAM APB bus clock rate is wrong before and after DVFS.
The register offset for APB bus clock is wrong, so fix it.

Signed-off-by: Bai Ping <ping.bai@nxp.com>
(cherry picked from commit 079eebba34b09d6f9ffeb70d999fb4a065008b1c)