MA-14173-4 Enable trusty for imx8mq_aiy
Config the base address(0xfe00_0000) and size(0x200_0000)
for Trusty OS to enable it on AIY board.
Test: Trusty OS boots up ok.
Change-Id: Ia7ed33447fc7b84ba2005d332c1379564fc647c1
Signed-off-by: Ji Luo <ji.luo@nxp.com>
diff --git a/plat/imx/imx8mq/imx8mq_bl31_setup.c b/plat/imx/imx8mq/imx8mq_bl31_setup.c
index 3fccf28..2969605 100644
--- a/plat/imx/imx8mq/imx8mq_bl31_setup.c
+++ b/plat/imx/imx8mq/imx8mq_bl31_setup.c
@@ -82,6 +82,8 @@
#define SMC_CMD_ALLOC_PAGE 0x01 /* allocate page to this partition */
#define SMC_CMD_DEALLOC_PART 0x03 /* deallocate partition */
+#define TRUSTY_PARAMS_LEN_BYTES (4096*2)
+
static entry_point_info_t bl32_image_ep_info;
static entry_point_info_t bl33_image_ep_info;
@@ -324,8 +326,13 @@
SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE);
bl32_image_ep_info.pc = BL32_BASE;
bl32_image_ep_info.spsr = 0;
+#ifdef SPD_trusty
+ bl32_image_ep_info.args.arg0 = BL32_SIZE;
+ bl32_image_ep_info.args.arg1 = BL32_BASE;
+#else
/* Pass TEE base and size to uboot */
bl33_image_ep_info.args.arg1 = 0xFE000000;
+#endif
/* TEE size + RDC reserved memory = 0x2000000 + 0x2000000 + 0x30000000 */
#ifdef DECRYPTED_BUFFER_START
bl33_image_ep_info.args.arg2 = 0x100000000 - DECRYPTED_BUFFER_START;
@@ -375,6 +382,10 @@
/* Map DDRC/PHY/PERF */
mmap_add_region(0x3c000000, 0x3c000000, 0x4000000, MT_DEVICE | MT_RW);
+#ifdef SPD_trusty
+ mmap_add_region(BL32_BASE, BL32_BASE, BL32_SIZE, MT_MEMORY | MT_RW);
+#endif
+
#if USE_COHERENT_MEM
mmap_add_region(BL31_COHERENT_RAM_BASE, BL31_COHERENT_RAM_BASE,
BL31_COHERENT_RAM_LIMIT - BL31_COHERENT_RAM_BASE,
@@ -421,3 +432,12 @@
{
return;
}
+
+#ifdef SPD_trusty
+void plat_trusty_set_boot_args(aapcs64_params_t *args)
+{
+ args->arg0 = BL32_SIZE;
+ args->arg1 = BL32_BASE;
+ args->arg2 = TRUSTY_PARAMS_LEN_BYTES;
+}
+#endif
diff --git a/plat/imx/imx8mq/include/platform_def.h b/plat/imx/imx8mq/include/platform_def.h
index 31ce296..8623711 100644
--- a/plat/imx/imx8mq/include/platform_def.h
+++ b/plat/imx/imx8mq/include/platform_def.h
@@ -26,6 +26,10 @@
#define BL31_BASE 0x910000
#define BL31_LIMIT 0x920000
#define BL32_BASE 0xfe000000
+#ifdef SPD_trusty
+#define BL32_SIZE 0x02000000
+#define BL32_LIMIT 0x100000000
+#endif
/* non-secure uboot base */
#define PLAT_NS_IMAGE_OFFSET 0x40200000
@@ -38,8 +42,13 @@
#define PLAT_VIRT_ADDR_SPACE_SIZE (1ull << 32)
#define PLAT_PHY_ADDR_SPACE_SIZE (1ull << 32)
+#ifdef SPD_trusty
+#define MAX_XLAT_TABLES 5
+#define MAX_MMAP_REGIONS 15
+#else
#define MAX_XLAT_TABLES 4
#define MAX_MMAP_REGIONS 14
+#endif
#define HAB_RVT_BASE 0x00000880 /* HAB_RVT for i.MX8MQ */
