| commit | f8459694d273b0017f8bbd9834c0d8d0b4bc35b8 | [log] [tgz] |
|---|---|---|
| author | Anson Huang <Anson.Huang@nxp.com> | Sat Dec 29 14:16:29 2018 +0800 |
| committer | Anson Huang <Anson.Huang@nxp.com> | Fri Jan 04 09:17:40 2019 +0800 |
| tree | e13da920ebbd873c11d6669f26b473b1ae197b36 | |
| parent | dbc8d9496ead9ecdd7c2a276b542a4fbbbf64027 [diff] |
Support for NXP's i.MX8 SoCs timer IPC NXP's i.MX8 SoCs have system controller (M4 core) which takes control of timer management like SRTC, watchdog etc., other Cortex-A clusters can send out command via MU (Message Unit) to system controller for timer operation etc.. This patch adds timer IPC(inter-processor communication) support. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>